Ticket #49: top.cpp

File top.cpp, 9.7 KB (added by silicomp <jrouland@…>, 16 years ago)
Line 
1/*
2 *
3 * SOCLIB_LGPL_HEADER_BEGIN
4 *
5 * This file is part of SoCLib, GNU LGPLv2.1.
6 *
7 * SoCLib is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU Lesser General Public License as published
9 * by the Free Software Foundation; version 2.1 of the License.
10 *
11 * SoCLib is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with SoCLib; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
19 * 02110-1301 USA
20 *
21 * SOCLIB_LGPL_HEADER_END
22 *
23 * Copyright (c) UPMC, Lip6, SoC
24 * Nicolas Pouillon <nipo@ssji.net>, 2006-2007
25 *
26 * Maintainers: nipo
27 */
28
29#include <iostream>
30#include <cstdlib>
31
32#include "mapping_table.h"
33#include "mips.h"
34#include "vci_xcache_wrapper.h"
35#include "ississ2.h"
36#include "vci_timer.h"
37#include "vci_ram.h"
38#include "vci_multi_tty.h"
39#include "vci_locks.h"
40#include "vci_vgmn.h"
41
42#include "iss_simhelper.h"
43
44#include "segmentation.h"
45
46#include "iss_memchecker.h"
47
48//soclib::common::IntTab a(8);
49
50int _main(int argc, char *argv[])
51{
52 using namespace sc_core;
53 // Avoid repeating these everywhere
54 using soclib::common::IntTab;
55 using soclib::common::Segment;
56
57 // Define our VCI parameters
58 typedef soclib::caba::VciParams<4,8,32,1,1,1,8,1,1,1> vci_param;
59
60 // Mapping table
61
62 soclib::common::MappingTable maptab(32, IntTab(8), IntTab(8), 0x00300000);
63
64 maptab.add(Segment("reset", RESET_BASE, RESET_SIZE, IntTab(0), true));
65 maptab.add(Segment("excep", EXCEP_BASE, EXCEP_SIZE, IntTab(0), true));
66 maptab.add(Segment("text" , TEXT_BASE , TEXT_SIZE , IntTab(0), true));
67
68 maptab.add(Segment("data" , DATA_BASE , DATA_SIZE , IntTab(1), true));
69
70 maptab.add(Segment("loc0" , LOC0_BASE , LOC0_SIZE , IntTab(1), true));
71 maptab.add(Segment("loc1" , LOC1_BASE , LOC1_SIZE , IntTab(1), true));
72 maptab.add(Segment("loc2" , LOC2_BASE , LOC2_SIZE , IntTab(1), true));
73 maptab.add(Segment("loc3" , LOC3_BASE , LOC3_SIZE , IntTab(1), true));
74
75 maptab.add(Segment("tty" , TTY_BASE , TTY_SIZE , IntTab(2), false));
76 maptab.add(Segment("timer", TIMER_BASE, TIMER_SIZE, IntTab(3), false));
77 maptab.add(Segment("locks", LOCKS_BASE, LOCKS_SIZE, IntTab(4), false));
78
79 // Signals
80
81 sc_clock signal_clk("signal_clk");
82 sc_signal<bool> signal_resetn("signal_resetn");
83
84 sc_signal<bool> signal_mips0_it0("signal_mips0_it0");
85 sc_signal<bool> signal_mips0_it1("signal_mips0_it1");
86 sc_signal<bool> signal_mips0_it2("signal_mips0_it2");
87 sc_signal<bool> signal_mips0_it3("signal_mips0_it3");
88 sc_signal<bool> signal_mips0_it4("signal_mips0_it4");
89 sc_signal<bool> signal_mips0_it5("signal_mips0_it5");
90
91 sc_signal<bool> signal_mips1_it0("signal_mips1_it0");
92 sc_signal<bool> signal_mips1_it1("signal_mips1_it1");
93 sc_signal<bool> signal_mips1_it2("signal_mips1_it2");
94 sc_signal<bool> signal_mips1_it3("signal_mips1_it3");
95 sc_signal<bool> signal_mips1_it4("signal_mips1_it4");
96 sc_signal<bool> signal_mips1_it5("signal_mips1_it5");
97
98 sc_signal<bool> signal_mips2_it0("signal_mips2_it0");
99 sc_signal<bool> signal_mips2_it1("signal_mips2_it1");
100 sc_signal<bool> signal_mips2_it2("signal_mips2_it2");
101 sc_signal<bool> signal_mips2_it3("signal_mips2_it3");
102 sc_signal<bool> signal_mips2_it4("signal_mips2_it4");
103 sc_signal<bool> signal_mips2_it5("signal_mips2_it5");
104
105 sc_signal<bool> signal_mips3_it0("signal_mips3_it0");
106 sc_signal<bool> signal_mips3_it1("signal_mips3_it1");
107 sc_signal<bool> signal_mips3_it2("signal_mips3_it2");
108 sc_signal<bool> signal_mips3_it3("signal_mips3_it3");
109 sc_signal<bool> signal_mips3_it4("signal_mips3_it4");
110 sc_signal<bool> signal_mips3_it5("signal_mips3_it5");
111
112 soclib::caba::VciSignals<vci_param> signal_vci_m0("signal_vci_m0");
113 soclib::caba::VciSignals<vci_param> signal_vci_m1("signal_vci_m1");
114 soclib::caba::VciSignals<vci_param> signal_vci_m2("signal_vci_m2");
115 soclib::caba::VciSignals<vci_param> signal_vci_m3("signal_vci_m3");
116
117 soclib::caba::VciSignals<vci_param> signal_vci_tty("signal_vci_tty");
118 soclib::caba::VciSignals<vci_param> signal_vci_vcimultiram0("signal_vci_vcimultiram0");
119 soclib::caba::VciSignals<vci_param> signal_vci_vcitimer("signal_vci_vcitimer");
120 soclib::caba::VciSignals<vci_param> signal_vci_vcilocks("signal_vci_vcilocks");
121 soclib::caba::VciSignals<vci_param> signal_vci_vcimultiram1("signal_vci_vcimultiram1");
122
123 sc_signal<bool> signal_tty_irq0("signal_tty_irq0");
124 sc_signal<bool> signal_tty_irq1("signal_tty_irq1");
125 sc_signal<bool> signal_tty_irq2("signal_tty_irq2");
126 sc_signal<bool> signal_tty_irq3("signal_tty_irq3");
127sc_trace_file* trace_file;
128
129
130
131trace_file = sc_create_vcd_trace_file("out");
132
133sc_trace(trace_file, signal_clk, "clk");
134
135sc_trace(trace_file, signal_resetn, "reset");
136
137sc_trace(trace_file, signal_tty_irq0, "irq0");
138
139
140 // Components
141
142 typedef soclib::common::IssIss2<soclib::common::IssSimhelper<soclib::common::MipsElIss> > iss_t;
143
144// soclib::caba::VciXcacheWrapper<vci_param, iss_t > mips0("mips0", 0,maptab,IntTab(0),1,8,4,1,8,4);
145// soclib::caba::VciXcacheWrapper<vci_param, iss_t > mips1("mips1", 1,maptab,IntTab(1),1,8,4,1,8,4);
146// soclib::caba::VciXcacheWrapper<vci_param, iss_t > mips2("mips2", 2,maptab,IntTab(2),1,8,4,1,8,4);
147// soclib::caba::VciXcacheWrapper<vci_param, iss_t > mips3("mips3", 3,maptab,IntTab(3),1,8,4,1,8,4);
148// With Memory checker
149 soclib::common::IssMemchecker<soclib::common::Mips32ElIss>::init(maptab, loader, "tty,timer,locks");
150 soclib::caba::VciXcacheWrapper<soclib::common::IssMemchecker<soclib::common::Mips32ElIss> > cpu0("mips0", 0, maptab, IntTab(0), 1,8,4, 1,8,4);
151 // With Memory checker
152
153 soclib::caba::VciXcacheWrapper<soclib::common::IssMemchecker<soclib::common::Mips32ElIss> > cpu0("mips1", 0, maptab, IntTab(0), 1,8,4, 1,8,4);
154 // With Memory checker
155
156 soclib::caba::VciXcacheWrapper<soclib::common::IssMemchecker<soclib::common::Mips32ElIss> > cpu0("mips2", 0, maptab, IntTab(0), 1,8,4, 1,8,4);
157 // With Memory checker
158
159 soclib::caba::VciXcacheWrapper<soclib::common::IssMemchecker<soclib::common::Mips32ElIss> > cpu0("mips3", 0, maptab, IntTab(0), 1,8,4, 1,8,4);
160
161 soclib::common::Loader loader("soft/bin.soft");
162 soclib::caba::VciRam<vci_param> vcimultiram0("vcimultiram0", IntTab(0), maptab, loader);
163 soclib::caba::VciRam<vci_param> vcimultiram1("vcimultiram1", IntTab(1), maptab, loader);
164 soclib::caba::VciMultiTty<vci_param> vcitty("vcitty", IntTab(2), maptab, "vcitty0", "vcitty1", "vcitty2", "vcitty3", NULL);
165 soclib::caba::VciTimer<vci_param> vcitimer("vcittimer", IntTab(3), maptab, 4);
166 soclib::caba::VciLocks<vci_param> vcilocks("vcilocks", IntTab(4), maptab);
167
168 soclib::caba::VciVgmn<vci_param> vgmn("vgmn",maptab, 4, 5, 2, 8);
169
170 // Net-List
171
172 mips0.p_clk(signal_clk);
173 mips1.p_clk(signal_clk);
174 mips2.p_clk(signal_clk);
175 mips3.p_clk(signal_clk);
176 vcimultiram0.p_clk(signal_clk);
177 vcimultiram1.p_clk(signal_clk);
178 vcilocks.p_clk(signal_clk);
179 vcitimer.p_clk(signal_clk);
180
181 mips0.p_resetn(signal_resetn);
182 mips1.p_resetn(signal_resetn);
183 mips2.p_resetn(signal_resetn);
184 mips3.p_resetn(signal_resetn);
185 vcimultiram0.p_resetn(signal_resetn);
186 vcimultiram1.p_resetn(signal_resetn);
187 vcilocks.p_resetn(signal_resetn);
188 vcitimer.p_resetn(signal_resetn);
189
190 mips0.p_irq[0](signal_mips0_it0);
191 mips0.p_irq[1](signal_mips0_it1);
192 mips0.p_irq[2](signal_mips0_it2);
193 mips0.p_irq[3](signal_mips0_it3);
194 mips0.p_irq[4](signal_mips0_it4);
195 mips0.p_irq[5](signal_mips0_it5);
196
197 mips1.p_irq[0](signal_mips1_it0);
198 mips1.p_irq[1](signal_mips1_it1);
199 mips1.p_irq[2](signal_mips1_it2);
200 mips1.p_irq[3](signal_mips1_it3);
201 mips1.p_irq[4](signal_mips1_it4);
202 mips1.p_irq[5](signal_mips1_it5);
203
204 mips2.p_irq[0](signal_mips2_it0);
205 mips2.p_irq[1](signal_mips2_it1);
206 mips2.p_irq[2](signal_mips2_it2);
207 mips2.p_irq[3](signal_mips2_it3);
208 mips2.p_irq[4](signal_mips2_it4);
209 mips2.p_irq[5](signal_mips2_it5);
210
211 mips3.p_irq[0](signal_mips3_it0);
212 mips3.p_irq[1](signal_mips3_it1);
213 mips3.p_irq[2](signal_mips3_it2);
214 mips3.p_irq[3](signal_mips3_it3);
215 mips3.p_irq[4](signal_mips3_it4);
216 mips3.p_irq[5](signal_mips3_it5);
217
218 mips0.p_vci(signal_vci_m0);
219 mips1.p_vci(signal_vci_m1);
220 mips2.p_vci(signal_vci_m2);
221 mips3.p_vci(signal_vci_m3);
222
223 vcimultiram0.p_vci(signal_vci_vcimultiram0);
224
225 vcitimer.p_vci(signal_vci_vcitimer);
226 vcitimer.p_irq[0](signal_mips0_it0);
227 vcitimer.p_irq[1](signal_mips1_it0);
228 vcitimer.p_irq[2](signal_mips2_it0);
229 vcitimer.p_irq[3](signal_mips3_it0);
230
231 vcilocks.p_vci(signal_vci_vcilocks);
232
233 vcimultiram1.p_vci(signal_vci_vcimultiram1);
234
235 vcitty.p_clk(signal_clk);
236 vcitty.p_resetn(signal_resetn);
237 vcitty.p_vci(signal_vci_tty);
238 vcitty.p_irq[0](signal_tty_irq0);
239 vcitty.p_irq[1](signal_tty_irq1);
240 vcitty.p_irq[2](signal_tty_irq2);
241 vcitty.p_irq[3](signal_tty_irq3);
242
243 vgmn.p_clk(signal_clk);
244 vgmn.p_resetn(signal_resetn);
245
246 vgmn.p_to_initiator[0](signal_vci_m0);
247 vgmn.p_to_initiator[1](signal_vci_m1);
248 vgmn.p_to_initiator[2](signal_vci_m2);
249 vgmn.p_to_initiator[3](signal_vci_m3);
250
251 vgmn.p_to_target[0](signal_vci_vcimultiram0);
252 vgmn.p_to_target[1](signal_vci_vcimultiram1);
253 vgmn.p_to_target[2](signal_vci_tty);
254 vgmn.p_to_target[3](signal_vci_vcitimer);
255 vgmn.p_to_target[4](signal_vci_vcilocks);
256
257 sc_start(sc_core::sc_time(0, SC_NS));
258 signal_resetn = false;
259 sc_start(sc_core::sc_time(1, SC_NS));
260 signal_resetn = true;
261
262#ifdef SOCVIEW
263 debug();
264#else
265 sc_start();
266#endif
267 return EXIT_SUCCESS;
268}
269
270int sc_main (int argc, char *argv[])
271{
272 try {
273 return _main(argc, argv);
274 } catch (std::exception &e) {
275 std::cout << e.what() << std::endl;
276 } catch (...) {
277 std::cout << "Unknown exception occured" << std::endl;
278 throw;
279 }
280 return 1;
281}