Custom Query (93 matches)
Results (7 - 9 of 93)
Ticket | Resolution | Summary | Owner | Reporter |
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#31 | wontfix | MappingTable: adding segment aliasing | ||
Description |
Most real HW platforms alias different memory area to the same hardware location. Could it be possible to implement this feature into the Mapping Table ? Example: Aliasing memory area on Mips platform in order to support 0x80000180 and 0xBFC00000 sharing the same memory as other memory area. |
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#77 | fixed | The setWriteBerr() method of the MIPS32 ISS doesn't induce a branch to the exception handler | ||
Description |
I execute a code that makes an illegal write access (out of segment) on the Mips32ElIss (wrapped in a VciXcacheWrapper). I observe an error code in the VCI RERROR field. It is correctly detected by the VciXcacheWrapper (I see the "write BERR" message), the setWriteBerr() method seems to be executed, but the processor does not branch to the exception handler... |
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#26 | fixed | Segmentation fault when initiating a DMA transfer | ||
Description |
Hello, I have a problem when initiating a DMA transfer. I attached the platform (top.cpp, segmentation.h, platform_desc) and the application (MJPEG.x) Everything runs smoothly, until a DMA transfer is initiated: [fetch_process] Send SOF info to LIBU and IDCT DMA transfer from 0x1004e620 to 0x1005779c (8 bytes) I verified in vci_dma.cpp 134 VciInitSimpleReadReq<vci_param> *req = 135 new VciInitSimpleReadReq<vci_param>( 136 &m_data[0], m_src+m_offset, burst ); The correct src address is used, but on te next transition, a segmentation fault appears Program received signal SIGSEGV, Segmentation fault. [Switching to Thread -1210737792 (LWP 5494)] soclib::caba::VciVgmn<soclib::caba::VciParams<4, 6, 32, 1, 1, 1, 8, 1, 1, 1> >::genMoore (this=0xbf948fb8)
380 can_take |= !m_dest->full(); I use compiler gcc (GCC) 4.1.2 20061115 (prerelease) (Debian 4.1.1-21) Thank you for your help Alexandre |