id	summary	reporter	owner	description	type	status	priority	component	resolution	keywords	cc
90	Mips32: Rare case of wrong EPC when fault is in branch delay slot	becoulet	developers	"When an exception occurs in a branch delay slot, the Mips processor must set EPC=fault_pc-4 and CAUSE:BD=1. The current test to check if a branch is taken is m_next_pc+4 != m_jump_pc, which fails when branching to branch instruction+8.

Test case:

b    1f
lw   $1, 1($0)  // raise bad alignment in delay slot
1:
nop

Branch is taken but m_next_pc+4 != m_jump_pc is false which results in EPC=fault_pc and CAUSE:BD=0 with current model implementation.
"	defect	new	minor	iss		mips mip32