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Timeline

7:39 PM Changeset [450] by Nicolas Pouillon: Add Mips32 to soclib-simulate-any
7:38 PM Changeset [449] by Nicolas Pouillon: Allow only one module to be built
7:38 PM Changeset [448] by Nicolas Pouillon: Add trace methods
4:09 PM Changeset [447] by Nicolas Pouillon: Add CFLAGS for mips32
1:34 PM Changeset [446] by Nicolas Pouillon: Quit on fd closing
12:03 PM Changeset [445] by Nicolas Pouillon: In Timer, dont set irq on initialization, rework memory allocation
2:02 AM Changeset [444] by Nicolas Pouillon: Fix SC
1:28 AM Changeset [443] by Nicolas Pouillon: Typo
1:19 AM Changeset [442] by Nicolas Pouillon: Update headers, update debugging condition
1:06 AM Changeset [441] by Nicolas Pouillon: New Mips32
1:05 AM Changeset [440] by Nicolas Pouillon: Add initializers to Iss2 requests and responses
1:04 AM Changeset [439] by Nicolas Pouillon: Support exception for mips and mips32
1:04 AM Changeset [438] by Nicolas Pouillon: Append tests to mips unaligned accesses, test mips32

4:11 PM Changeset [437] by alain: Adding reordering Write buffer for L1 caches
2:59 PM Changeset [436] by Joel Porquet: Removed Joel's directory
12:10 PM Changeset [435] by alinevieiramello@…: Modification and inclusion of TLM-T components

9:52 AM Changeset [434] by Nicolas Pouillon: Add Microblaze to soclib-simulate-any
2:07 AM Changeset [433] by Nicolas Pouillon: Add xcache wrapper to soclib-simulate-any
2:07 AM Changeset [432] by Nicolas Pouillon: Test corner cases of data accesses
2:06 AM Changeset [431] by Nicolas Pouillon: Move Xcache wrapper to iss2
2:05 AM Changeset [430] by Nicolas Pouillon: Improve exception handling
2:05 AM Changeset [429] by Nicolas Pouillon: Add -DSOCLIB to cflags, plus SOCLIB_MODE_*
2:04 AM Changeset [428] by Nicolas Pouillon: Port some examples to caba xcache_wrapper and ississ2 wrapper
1:55 AM Changeset [427] by Nicolas Pouillon: Improve correctness of models
1:55 AM Changeset [426] by Nicolas Pouillon: Improve Iss2 and import an Iss to Iss2 wrapper
1:54 AM Changeset [425] by Nicolas Pouillon: Merge mips r3000 directories

7:34 PM Changeset [422] by dimitri.refauvelet@…: Creating a clean branch for VCache
6:47 PM Changeset [421] by dimitri.refauvelet@…: Branch with Vcache
6:43 PM Changeset [420] by dimitri.refauvelet@…: Useless branch
4:32 PM Changeset [419] by Nicolas Pouillon: Add mode to global makefile
2:33 PM Changeset [418] by gracia: Fixed arm966 and arm7 access to local and external memory.

11:54 AM Changeset [417] by Joel Porquet: Added CID support in MipsCPU and cache models
11:42 AM Changeset [416] by carrier: Initial import with regular soclib components
11:40 AM Changeset [415] by carrier: Created a new branch for the CID platform development
9:33 AM Frequently Asked Questions edited by Nicolas Pouillon: make going wrong (diff)

4:55 PM Changeset [412] by alinevieiramello@…: Adding the activity counters to TLM-T model
12:13 PM Changeset [411] by alinevieiramello@…: Updating of TLM-T components

3:56 PM Changeset [410] by Nicolas Pouillon: Make soclib_endian work under solaris9
11:06 AM Component/ARM966 edited by gracia: (diff)
10:01 AM Component/ARM7TDMI edited by gracia: (diff)

2:52 AM Changeset [409] by Nicolas Pouillon: Make arch_stamp test more reliable
2:42 AM Changeset [408] by Nicolas Pouillon: Add warning about multiple drivers
2:00 AM Changeset [407] by Nicolas Pouillon: Use modern constructs in pibus

11:56 PM Changeset [406] by Nicolas Pouillon: Update paths
8:36 PM Changeset [405] by alinevieiramello@…: Modification in the arbritation of vgmn component in TLM-T model
5:01 PM Changeset [404] by Nicolas Pouillon: Make cleanup-terms clean dsx wrapped processes
5:00 PM Installation Notes edited by Nicolas Pouillon: (diff)
5:00 PM Installation Notes edited by Nicolas Pouillon: (diff)
4:58 PM Installation Notes edited by Nicolas Pouillon: Platform renaming (diff)

4:49 PM Changeset [398] by alinevieiramello@…: Correction of LL and SC vci transactions in the TLM-T vci_xcache_wrapper
4:25 PM Changeset [397] by Nicolas Pouillon: More memory correctness
1:01 PM Changeset [396] by Nicolas Pouillon: Be kind with memory…
11:57 AM Changeset [395] by Nicolas Pouillon: Add arm compiler flags defaults
10:18 AM Changeset [394] by Nicolas Pouillon: Update profiler doc

5:04 PM Changeset [393] by Nicolas Pouillon: Use new debug way
4:35 PM Changeset [392] by Nicolas Pouillon: Update xcache_wrapper, debugged with alain
2:43 PM Changeset [391] by alinevieiramello@…: Correction of Addressing error
2:42 PM Changeset [390] by alinevieiramello@…: Correction of Addressing Error
2:09 PM Changeset [389] by alinevieiramello@…: Change of vci_xcache for vci_xcache_wrapper
1:42 PM Changeset [388] by alinevieiramello@…: Delete the vci_xcache described in TLM-T model
1:39 PM Changeset [387] by alinevieiramello@…: Add the vci_xcache_wrapper decribed in TLM-T model
1:27 PM Changeset [386] by alinevieiramello@…: Add the vci_xcache_wrapper decribed in TLM-T model
12:52 PM Changeset [385] by Nicolas Pouillon: Update metadata to work with DSX
12:33 PM Changeset [384] by yang: delete portRegister
12:32 PM Changeset [383] by yang: Add use of generic fifo
12:24 PM Changeset [382] by alinevieiramello@…: Time calibration according to CABA model
12:23 PM Changeset [381] by alinevieiramello@…: Time calibration according to CABA model
12:19 PM Changeset [380] by alinevieiramello@…: Initialization of variables

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