Timeline
Mar 21, 2013:
- 5:39 PM Changeset [2291] by
- - Added preamble on the incoming ethernet packets - Updated path in …
- 4:40 PM Changeset [2290] by
- vci_multi_nic: - Adding preamble treatment (on RX_G2S, TX_SER and …
- 3:57 PM Changeset [2289] by
- Another bug fixing…
- 1:15 PM Changeset [2288] by
- Bug fixing
- 1:11 PM Changeset [2287] by
- Bug fixing
- 11:06 AM Changeset [2286] by
- Bug fix : typo in vci_dspin_target_wrapper and …
Mar 20, 2013:
- 6:08 PM Changeset [2285] by
- Major rewriting this wrapper is without FIFO.
- 6:05 PM Changeset [2284] by
- Major rewriting. This wrapper is without FIFO.
Mar 18, 2013:
- 5:07 PM Changeset [2283] by
- One more bug
- 3:56 PM Changeset [2282] by
- Another bug fixing
- 2:45 PM Changeset [2281] by
- Bugfix in component dspin_local_crossbar : updated metadata file …
- 1:28 PM Changeset [2280] by
- bug fixing
- 12:21 PM Changeset [2279] by
- Introducing component dspin_local_crossbar
Mar 14, 2013:
- 4:53 PM Changeset [2278] by
- Bug (typo) correction in the fifo virtual coprocessor wrapper
Feb 24, 2013:
- 3:13 PM Changeset [2277] by
- Introducing PTD bypass optimisation.
- 11:09 AM Changeset [2276] by
- Improving comments
Feb 22, 2013:
- 5:43 PM Changeset [2275] by
- Introducing the caba_vgmn_noc_mmu platform intended to test the …
- 5:38 PM Changeset [2274] by
- TBD as To Be Debug
- 4:31 PM Changeset [2273] by
- bof
Feb 19, 2013:
- 7:45 PM Changeset [2272] by
- Introducing a new version providing a DMA chbuf interface
- 11:19 AM Changeset [2271] by
- Introducing the new XTN_MMU_LL_RESET code in the XTN addressable registers
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