| | 1 | [wiki:Component SocLib Components General Index] |
| | 2 | |
| | 3 | = !HalfGatewayInitiator = |
| | 4 | |
| | 5 | == 1) Functional Description == |
| | 6 | |
| | 7 | This hardware component is a component of RingGateway. It handles outcoming commands and incoming responses to and from the ring to which it is attached. |
| | 8 | |
| | 9 | == 2) Component definition & usage == |
| | 10 | |
| | 11 | source:trunk/soclib/soclib/module/network_component/half_gateway_initiator/caba/metadata/halfe_gateway_initiator.sd |
| | 12 | |
| | 13 | == 3) CABA implementation == |
| | 14 | |
| | 15 | === CABA sources === |
| | 16 | |
| | 17 | * interface : source:trunk/soclib/soclib/module/network_component/half_gateway_initiator/caba/source/include/half_gateway_initiator.h |
| | 18 | * implementation : source:trunk/soclib/soclib/module/network_component/half_gateway_initiator/caba/source/src/half_gateway_initiator.cpp |
| | 19 | |
| | 20 | === CABA Constructor parameters === |
| | 21 | |
| | 22 | {{{ |
| | 23 | HalfGatewayInitiator(sc_module_name insname, // instance name |
| | 24 | bool alloc_init, // default initiator token owner |
| | 25 | const int &rsp_fifo_depth, // response fifo depth |
| | 26 | const soclib::common::MappingTable &mt, // mapping table |
| | 27 | const soclib::common::IntTab &ringid, // global subsystem index |
| | 28 | bool local); // routing parameter |
| | 29 | }}} |
| | 30 | |
| | 31 | === CABA ports === |
| | 32 | |
| | 33 | * sc_in<bool> p_clk; // Global system clock |
| | 34 | * sc_in<bool> p_resetn; // Global system reset |
| | 35 | * soclib::caba::!RingIn p_ring_in; // Ring input port |
| | 36 | * soclib::caba::!RingOut p_ring_out; // Ring output port |
| | 37 | * soclib::caba::!GateInitiator p_gate_initiator; // Port to gate target |
| | 38 | |
| | 39 | |
| | 40 | == 4) TLMT implementation == |
| | 41 | |
| | 42 | The TLM-T implementation is not available yet. |