Changes between Version 10 and Version 11 of Component/Iss2Api


Ignore:
Timestamp:
Dec 13, 2012, 3:13:40 PM (11 years ago)
Author:
alain
Comment:

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  • Component/Iss2Api

    v10 v11  
    5959|| MMU_RELEASE           ||  16   || Generic MMU release number                || R    ||
    6060
    61 === Instruction request and response ===
     61=== Instruction request ===
    6262
    6363Instruction request, only significant if `valid' is asserted.
     
    7272
    7373
    74 Instruction response.
     74=== Instruction response ===
    7575
    7676Valid is asserted when query has beed satisfied, if no request
     
    8686}}}
    8787
    88 === Data request and response ===
     88=== Data request ===
    8989
    9090Data request, only significant if `valid' is asserted.
     
    111111
    112112
    113 Data response.
     113=== Data response ===
    114114
    115115Valid is asserted when query has beed satisfied, if no request
     
    134134=== void reset() ===
    135135
    136 Reset operation, Iss must behave like the processor receiving a reset cycle.
    137 
    138 Tell the Iss to execute *at most* ncycle cycles, knowing the
    139 value of all the irq lines. Each irq is a bit in the
    140 irq_bit_field word.
     136Reset processor internal register. Iss must behave like the processor receiving a reset cycle.
     137
     138=== void getRequests( struct !InstructionRequest &, struct !DataRequest & ) ===
     139
     140Iss must populate the request fields.
    141141
    142142=== uint32_t executeNCycles( uint32_t ncycle, const struct !InstructionResponse &, const struct !DataResponse &, uint32_t irq_bit_field ) ===
    143143
    144  * Iss is given back the responses. They may not be valid.
    145  * Iss must return the number of cycles it actually executed knowing the inputs (responses and irqs) won't change.
    146   * This is at most ncycle.
    147  * ncycle may be 0 if wrapper only wants the ISS to handle its inputs, but not actually simulate anything. This is mostly used on GDB breakpoints.
    148 
    149 === void getRequests( struct !InstructionRequest &, struct !DataRequest & ) ===
    150 
    151 Iss must populate the request fields.
     144Tell the Iss to execute *at most* ncycle cycles, knowing the values of the responses and the
     145value of all the irq lines. The responses may not be valid. Each irq is a bit in the irq_bit_field word.
     146
     147Iss must return the number of cycles it actually executed, knowing the inputs (responses and irqs) won't change.
     148This number is at most ncycle.
     149The ncycle argument may be 0 if wrapper only wants the ISS to handle its inputs, but not actually change the processor state. This is mostly used on GDB breakpoints.
    152150
    153151=== bool virtualToPhys(addr_t &addr) const ===
    154152
    155 Iss must translate virtual address to physical address. It returns false if
     153Iss translate virtual address to physical address if it the processor contains an internal MMU. It returns false if
    156154the virtual address is not mapped. This function does nothing but returning true
    157 if no mmu is implemented in the Iss.
     155if no MMU is implemented in the Iss.
    158156
    159157=== void setWriteBerr() ===