| 1 | [wiki:Component SocLib Components General Index] |
| 2 | |
| 3 | = ISS Wrapper = |
| 4 | |
| 5 | This hardware component is a generic ISS wrapper. It can embed any ISS based on source:trunk/soclib/systemc/include/common/iss/iss.h. |
| 6 | |
| 7 | == Template parameters == |
| 8 | |
| 9 | IssWrapper takes the wrapped ISS as template parameter. |
| 10 | {{{ |
| 11 | soclib::caba::IssWrapper<typename iss_t> |
| 12 | }}} |
| 13 | For instance if wrapping a [wiki:Component/Mips Mips]: |
| 14 | {{{ |
| 15 | soclib::caba::IssWrapper<soclib::common::MipsIss> |
| 16 | }}} |
| 17 | |
| 18 | == Constructor parameters == |
| 19 | |
| 20 | * `name`: The cell name |
| 21 | * `ident`: The processor number |
| 22 | |
| 23 | {{{ |
| 24 | IssWrapper( sc_module_name name, int ident ); |
| 25 | }}} |
| 26 | |
| 27 | Again, with a mips, we get: |
| 28 | {{{ |
| 29 | soclib::caba::IssWrapper<soclib::common::MipsIss> mips0( "mips0", 0 ); |
| 30 | }}} |
| 31 | |
| 32 | == Ports == |
| 33 | |
| 34 | * sc_in<bool> '''p_resetn''' : Global system reset |
| 35 | * sc_in<bool> '''p_clk''' : Global system clock |
| 36 | * sc_in<bool> '''p_irq![N]''' : The interrupts. N is defined by the wrapped ISS. |
| 37 | * soclib::caba::!IcacheProcesssorPort '''p_icache''' : Instruction cache interface to the [wiki:Component/VciXcache VciXcache] |
| 38 | * soclib::caba::!DcacheProcesssorPort '''p_dcache''' : Data cache interface to the [wiki:Component/VciXcache VciXcache] |
| 39 | |