| 70 | | Cacheability is a by-segment attribute. All addresses in all cacheable segments define |
| 71 | | a unique ''cacheability mask'', that is used by |
| 72 | | the [wiki:Component/VciXcache VciXcache] component to determine the cacheability. |
| 73 | | This will be checked by the mapping table, or you'll get an `"Incoherent MappingTable" exception`. |
| | 70 | Cacheability is a by-segment attribute. Cacheability is implemented by the [wiki:Component/VciXcache VciXcache] component. As this component does not implement a MMU, it contains a dedicated address decoder to determine the cacheability. This decoder is implemented as a '''Cacheability Table'''. |
| | 71 | This table is indexed by the address bits defined by the cacheability_mask, and contains the |
| | 72 | Boolean defining the cacheability. |
| | 73 | |
| | 74 | The content of the '''Cacheability Table''' is automatically constructed by a method of the mapping table. |
| | 75 | Of course, the mapping of the cacheable segments must be consistent with the cacheability mask defined in the mapping table. This is checked by the mapping table, and you'll get an `"Incoherent MappingTable" exception` if the mapping is inconsistent. |
