Changes between Version 11 and Version 12 of Component/Mapping Table

Timestamp:

Feb 11, 2008, 11:34:21 AM (16 years ago)

Author:

alain

Comment:

--

Component/Mapping Table

@@ -16 +16 @@
 From this centralized description, it is possible to derive the '''routing tables''' used by the 
 hardware interconnect components to decode the VCI address, and route the VCI packets to 
-the proper VCI target.
-
-All VCI initiators and VCI targets share the same  address space, but the address decoding 
-scheme can support a structured interconnect.
+the proper VCI target. It is also possible to derive the '''Cacheability Table''' used by the
+cache controllers to determine cached & uncached addresses.
 
 == 2) Usage ==
@@ -93 +91 @@
    0 and M-1 (where M is the total number of VCI initiators). 
 
-The hardware interconnect contains a ROM implementing a '''routing table''' indexed by the
+The hardware interconnect contains a ROM implementing a '''Routing Table''' indexed by the
 VCI address MSBs and containing the corresponding target index.
-The content of this '''routing table''' is automatically computed by a method associated to the mapping table.
+The content of this  table is automatically computed by a method associated to the mapping table.
 
 === Two-level interconnect ===