118 | | Cacheability is a by-segment attribute. Cacheability is implemented by the [wiki:Component/VciXcache VciXcache] component. As this component does not implement a MMU, it contains a dedicated address decoder to determine the cacheability. This decoder is implemented as a '''Cacheability Table'''. |
119 | | This table is accessed by the cache controller for each processor request. This table is indexed by the |
120 | | address bits defined by the cacheability_mask, and contains the Boolean defining the cacheability. |
| 118 | Cacheability is a segment attribute, and is implemented by the [wiki:Component/VciXcache VciXcache] component. As this component does not implement a MMU, it contains a dedicated address decoder to determine the cacheability. This decoder is implemented as a '''Cacheability Table''', that is accessed by the cache controller for each processor request. This table is indexed by the address bits selected by the cacheability mask. The table output is a Boolean defining the cacheability. |