Changes between Version 19 and Version 20 of Component/Mapping Table
- Timestamp:
- Aug 14, 2008, 5:15:15 PM (16 years ago)
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Component/Mapping Table
v19 v20 116 116 == 4) Cacheability Table == 117 117 118 Cacheability is a segment attribute , and is implemented by the [wiki:Component/VciXcache VciXcache] component. As this component does not implement a MMU, it contains a dedicated address decoder to determine the cacheability. This decoder is implemented as a '''Cacheability Table''', that is accessed by the cache controller for each processor request. This table is indexed by the address bits selected by the cacheability mask. The table output is a Boolean defining the cacheability.118 Cacheability is a segment attribute that can be exploited by some cache controllers such as [wiki:Component/VciXcacheWrapper VciXcacheWrapper] component. As this component does not implement a MMU, it contains a dedicated address decoder to determine the cacheability. This decoder is implemented as a '''Cacheability Table''', that is accessed by the cache controller for each processor request. This table is indexed by the address bits selected by the cacheability mask. The table output is a Boolean defining the cacheability. 119 119 120 120 The content of the '''Cacheability Table''' is automatically constructed by a method of the mapping table.