10 | | A segment is a set of consecutive addresses in the address space. Each segment has a name, and is characterized by the following fields: |
11 | | * string '''name''' |
12 | | * addr_t '''base_address''' |
13 | | * size_t '''size''' |
14 | | * !IntTab '''target_index''' |
15 | | * bool '''cacheability''' |
| 10 | |
| 11 | The mapping table is a centralized description of both the address space segmentation, |
| 12 | and the mapping of the segments on the VCI physical targets. |
| 13 | |
| 14 | From this centralized description, it is possible to derive the '''routing tables''' used by the |
| 15 | hardware interconnect to decode the VCI address, and route the VCI packets to the proper target. |
| 16 | |
| 17 | All VCI initiators and VCI targets share the same address space, but the address decoding |
| 18 | scheme can support a structured interconnect. |
| 19 | |
| 20 | = Usage = |
| 21 | |
| 22 | == Mapping Table == |
| 23 | |
| 24 | Mapping table must know: |
| 25 | * The address width |
| 26 | * The number interconnection levels (most of the time 1 or 2) |
| 27 | * The widths of the address subfields used for command routing |
| 28 | * The widths of the RSRCID subfields used for response routing |
| 29 | * The mask used in XCache for determining if an address is cacheable or not |
| 30 | |
| 31 | The number of interconnection levels is implicit by the length of lists of subfields lengths. |
| 32 | |
| 33 | MappingTable instanciation is: |
| 34 | |
| 35 | {{{ |
| 36 | MappingTable maptab( addr_width, addr_bits, srcid_bits, cacheability_mask); |
| 37 | }}} |
| 38 | |
| 39 | For instance: |
| 40 | {{{ |
| 41 | MappingTable maptab( 32, IntTab(8, 4), IntTab(8, 2), 0x000c0000); |
| 42 | }}} |
| 43 | |
| 44 | This creates a 32-bit MappingTable, with 2 level interconnection, |
| 45 | 8 address bits for global command routing, 4 address bits for local command routing, |
| 46 | 8 RSRCID bits for global response routing, 2 RSRCID bits for local response routing. |
| 47 | This makes RSRCID field 10-bit wide, this should be enforced. |
| 48 | |
| 49 | == Segments == |
| 50 | |
| 51 | Segments holds information about a portion of addressable memory region, with some attributes: |
| 52 | * a name |
| 53 | * a base address |
| 54 | * a size |
| 55 | * a target_index (an !IntTab) |
| 56 | * a cacheability flag |
| 57 | |
22 | | Therefore, the mapping table is a centralized description of both the address space segmentation, |
23 | | and the mapping of the segments on the VCI physical targets. |
24 | | From this centralized description, it is possible to derive the '''routing tables''' used by the |
25 | | hardware interconnect to decode the VCI address, and route the VCI packets to the proper target. |
| 64 | A Segment instanciation is: |
| 65 | {{{ |
| 66 | Segment( name, base_address, size, target, cacheable ) |
| 67 | }}} |
27 | | All VCI initiators and VCI targets share the same address space, but the address decoding |
28 | | scheme can support a structured interconnect. |
| 69 | For instance: |
| 70 | {{{ |
| 71 | Segment( "seg0", 0x50000, 0x1000, IntTab(3,2), true ) |
| 72 | }}} |
| 73 | |
| 74 | This segment is associated to target on port 2 in cluster no 3. It is cacheable. |
| 75 | |
| 76 | It can be added in MappingTable with the method add(): |
| 77 | {{{ |
| 78 | maptab.add(Segment( "seg0", 0x50000, 0x1000, IntTab(3,2), true )) |
| 79 | }}} |
| 80 | |
| 81 | For each new segment added, the mapping table will ensure the segments are not overlapping. |
| 82 | |
| 83 | == Cacheability == |
| 84 | |
| 85 | Cacheability is a by-segment attribute. It is associated to the address. Here, "seg0" is at address 0x50000, and cacheability mask is |
| 86 | 0xc0000, resulting cacheability-determining-address is `0x50000 & 0xc0000 = 0x40000`. Now, for any other address matching |
| 87 | `address & 0xc0000 = 0x40000`, cacheability will be true. This will be enforced by mapping_table or you'll get an `"Incoherent MappingTable" exception`. |
| 88 | |
| 89 | = Interconnection examples = |
61 | | * all VCI targets in the same cluster must have the same global index. |
62 | | * all VCI targets in the same cluster must have different local indexes. |
63 | | * all VCI initiators in the same cluster must have the same global index. |
64 | | * all VCI initiators in the same cluster must have different local indexes. |
65 | | * The VCI ADDRESS field is structured in three fields : | MSB | LSB | OFFSET | |
| 122 | * all VCI components in the same cluster must have the same global index. |
| 123 | * all VCI components in the same cluster must have different local indexes. |
| 124 | * The VCI ADDRESS field is structured in three fields : `| MSB | LSB | OFFSET |` |