Changes between Version 4 and Version 5 of Component/Micro Blaze
- Timestamp:
- Feb 5, 2008, 1:52:16 PM (17 years ago)
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Component/Micro Blaze
v4 v5 3 3 = MicroBlaze Processor Functional Description = 4 4 5 This hardware component is a MicroBlaze processor core as described in [www.xilinx.com/ise/embedded/mb_ref_guide.pdf ].5 This hardware component is a MicroBlaze processor core as described in [www.xilinx.com/ise/embedded/mb_ref_guide.pdf the Xilinx documentation]. 6 6 Note that the 9.2 version of ISE contains a pretty major evolution of the MicroBlaze that integrates a MMU, but this is not the version available within SoCLib (at least yet!). 7 7 This component is an ISS, which should be wrapped with an [wiki:Component/IssWrapper IssWrapper] for integration into a complete platform. … … 13 13 The support for symetric and asymetric multiprocessing is hardwired using the `fsl` feature of the MicroBlaze. 14 14 The processor number is given at instanciation time, and accessible through `get` on `fsl0`. 15 Using other `fsl` will lead to an abort.15 Using other `fsl`s will lead to an abort. 16 16 17 17 = Component definition =