Changes between Version 10 and Version 11 of Component/Mips


Ignore:
Timestamp:
Sep 25, 2007, 10:54:43 AM (17 years ago)
Author:
Nicolas Pouillon
Comment:

More ISS things

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  • Component/Mips

    v10 v11  
    3030}}}
    3131
    32 = Mips Processor  CABA  Implementation =
     32= Mips Processor  ISS  Implementation =
    3333
    34 The caba implementation is in
     34The implementation is in
    3535 * source:trunk/soclib/systemc/include/common/iss/mips.h
    3636 * source:trunk/soclib/systemc/src/common/iss/mips.cc
     
    4343== Constructor parameters ==
    4444{{{
    45 Mips(
     45MipsIss(
    4646     sc_module_name name,   //  Instance Name
    4747     int  ident);   // processor id
     
    5151
    5252 The following internal registers define the processor internal state, and can be inspected:
    53  * PC : Program counter
    54  * IR : Instruction register
    55  * GPR[i] : General registers ( 0 < i < 32)
    56  * HI & LO : Intermediate registers for multiply / divide instructions
    57  * CP0_REG[i] : Coprocessor 0 registers (0<=i<32). Implemented values:
     53 * r_pc : Program counter
     54 * m_ins : Instruction register
     55 * r_gpr[i] : General registers ( 0 < i < 32)
     56 * r_hi & r_lo : Intermediate registers for multiply / divide instructions
     57 * r_cp0[i] : Coprocessor 0 registers (0<=i<32). Implemented values:
    5858  *  8: BAR : Bad address register
    5959  * 12: SR : Status register
     
    6565
    6666None, it is to the wrapper to provide them.
    67