Changes between Version 10 and Version 11 of Component/Mips
- Timestamp:
- Sep 25, 2007, 10:54:43 AM (18 years ago)
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Component/Mips
v10 v11 30 30 }}} 31 31 32 = Mips Processor CABAImplementation =32 = Mips Processor ISS Implementation = 33 33 34 The cabaimplementation is in34 The implementation is in 35 35 * source:trunk/soclib/systemc/include/common/iss/mips.h 36 36 * source:trunk/soclib/systemc/src/common/iss/mips.cc … … 43 43 == Constructor parameters == 44 44 {{{ 45 Mips (45 MipsIss( 46 46 sc_module_name name, // Instance Name 47 47 int ident); // processor id … … 51 51 52 52 The following internal registers define the processor internal state, and can be inspected: 53 * PC: Program counter54 * IR: Instruction register55 * GPR[i] : General registers ( 0 < i < 32)56 * HI & LO: Intermediate registers for multiply / divide instructions57 * CP0_REG[i] : Coprocessor 0 registers (0<=i<32). Implemented values:53 * r_pc : Program counter 54 * m_ins : Instruction register 55 * r_gpr[i] : General registers ( 0 < i < 32) 56 * r_hi & r_lo : Intermediate registers for multiply / divide instructions 57 * r_cp0[i] : Coprocessor 0 registers (0<=i<32). Implemented values: 58 58 * 8: BAR : Bad address register 59 59 * 12: SR : Status register … … 65 65 66 66 None, it is to the wrapper to provide them. 67