Changes between Version 5 and Version 6 of Component/Mips
- Timestamp:
- May 6, 2007, 2:38:32 PM (18 years ago)
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Component/Mips
v5 v6 37 37 38 38 The following internal registers define the processor internal state, and can be inspected: 39 * PC : program counter39 * PC : Program counter 40 40 * IR : Instruction register 41 41 * GR[i] : General registers ( 0 < i < 32) 42 * HI & LO : intermediate registers for multiply / divide instructions43 * IDENT : processor id register = CP0[0]42 * HI & LO : Intermediate registers for multiply / divide instructions 43 * IDENT : Processor id register = CP0[0] 44 44 * BAR : Bad address register = CP0[8] 45 45 * SR : Status register = CP0[12]
