[wiki:Component SocLib Components General Index] = !RingGateway = == 1) Functional Description == In a clusterized architecture, clusters are connected to the global interconnect through dedicated interfaces : !RingGateways. One !RingGateway component is attached to one ring interconnect. This hardware component is composed of two components : * [wiki:Component/HalfGatewayInitiator HalfGatewayInitiator] : handles incoming commands and outcoming responses to and from the interconnect to which it is attached * [wiki:Component/HalfGatewayTarget HalfGatewayTarget] : handles outcoming commands and incoming responses to and from the interconnect to which it is attached. [[Image(RingGateway.png, nolink, align=center)]] HGI : Half Gateway Initiator HGT : Half Gateway Target == 2) Component definition & usage == source:trunk/soclib/soclib/module/network_component/ring_gateway/caba/metadata/ring_gateway.sd == 3) CABA implementation == === CABA sources === * interface : source:trunk/soclib/soclib/module/network_component/ring_gateway/caba/source/include/ring_gateway.h * implementation : source:trunk/soclib/soclib/module/network_component/ring_gateway/caba/source/src/ring_gateway.cpp === CABA Constructor parameters === {{{ RingGateway( sc_module_name insname, // instance name const soclib::common::MappingTable &mt, // mapping table const soclib::common::IntTab &ringid, // global subsystem index bool alloc_init, // default initiator token owner bool alloc_target, // default target token owner bool local, // routing parameter const int &half_gateway_fifo_depth); // half gateway fifo depth }}} === CABA ports === * sc_in p_clk; // Global system clock * sc_in p_resetn; // Global system reset * soclib::caba::!RingIn p_ring_in; // Ring input port * soclib::caba::!RingOut p_ring_out; // Ring output port * soclib::caba::!GateInitiator p_gate_initiator; // Port to gate target * soclib::caba::!GateTarget p_gate_target; // Port to gate initiator == 4) TLMT implementation == The TLM-T implementation is not available yet.