Changes between Version 4 and Version 5 of Component/Tc4200


Ignore:
Timestamp:
Mar 19, 2010, 4:26:26 PM (14 years ago)
Author:
turbo07
Comment:

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  • Component/Tc4200

    v4 v5  
    1010
    1111
    12 [[Image(tc4200.png,align=top,nolink)]]
     12[[Image(tc4200.png,align=top,nolink, title=Figure 1 - Tc4200)]]
    1313
    1414Figure 1 presents the general core structure. The Tc4200 is made of a VCI wrapper and an internal hardware decoder model which communicates using proprietary FIFO-like protocols.
     
    1616
    1717
    18 == 2) Component definition & usage ==
     18
     19
     20== 2) CABA Implementation ==
     21
     22== a) Component definition & usage ==
    1923
    2024  * source:trunk/soclib/soclib/module/streaming_component/tc4200/caba/metadata/tc4200.sd
    2125  * source:trunk/soclib/binary/module/streaming_component/tc4200/caba/doc
    2226
    23 
    24 == 3) CABA Implementation ==
    25  
    26 === CABA sources ===
     27== b) CABA sources ==
    2728
    2829 * interface : source:trunk/soclib/soclib/module/streaming_component/tc4200/caba/source/include/tc4200.h
     
    4849      * {{{TC4200_MONITOR}}} Monitoring interface. See Figure 2
    4950
    50         [[Image(monitor_reg.png,align=top, nolink)]]
     51        [[Image(monitor_reg.png,align=top, nolink, title=Figure 2 - Monitoring register.)]]
    5152
    5253  * Write only registers
     
    5556      * {{{TC4200_D_IN}}} Register for any other input frame data. See Figure 5.
    5657
    57         [[Image(config_reg.png, align=top,nolink)]]
    5858
    59         [[Image(data_in_first.png, align=top,nolink)]]
     59        [[Image(config_reg.png, align=top,nolink, title=Figure 3 - Configuration register.)]]
    6060
    61         [[Image(data_in.png, align=top,nolink)]]
    62 .
     61        [[Image(data_in_first.png, align=top,nolink, title=Figure 4 - First data of a new frame register.)]]
     62
     63        [[Image(data_in.png, align=top,nolink, title=Figure 5 - Data register. Value for the i-th written data.)]]
     64
    6365
    6466
     
    6971 * soclib::common::!VciTarget<vci_param> '''p_vci''' : The VCI port
    7072
    71 == 4)  TLM-T Implementation ==
     73== 3)  TLM-DT Implementation ==
     74  The TLM-DT implementation assumes the instantiation of the MWMR component.
    7275
    73 === TLM-T sources ===
     76== a) Component definition & usage ==
     77
     78  * source:trunk/soclib/soclib/module/streaming_component/tc4200/tlmdt/metadata/tc4200.sd
     79  * source:trunk/soclib/binary/module/streaming_component/tc4200/tlmdt/doc
     80 
    7481
    7582
    76  * interface : source:trunk/soclib/soclib/module/streaming_component/tc4200/tlmt/source/include/tc4200.h
    77  * implementation : source:trunk/soclib/soclib/module/streaming_component/tc4200/tlmt/source/src/tc4200.cpp
    78  * internal component interface : source:trunk/soclib/binary/module/streaming_component/tc4200/tlmt/include/tc_tc4200.h
    79  * internal component library : source:trunk/soclib/binary/module/streaming_component/tc4200/tlmt/lib
     83== b) TLM-DT sources ==
    8084
    8185
    82 == 5) Limitation ==
     86 * interface : source:trunk/soclib/soclib/module/streaming_component/tc4200/tlmdt/source/include/tc4200.h
     87 * implementation : source:trunk/soclib/soclib/module/streaming_component/tc4200/tlmdt/source/src/tc4200.cpp
     88 * internal component interface : source:trunk/soclib/binary/module/streaming_component/tc4200/tlmdt/include/tc_tc4200.h
     89 * internal component library : source:trunk/soclib/binary/module/streaming_component/tc4200/tlmdt/lib
     90
     91=== TLM-DT Constructor parameters ===
     92{{{
     93Tc4200(
     94     sc_module_name name,                     // Instance name
     95     uint32_t       id,
     96     uint32_t       MWMR2core_fifo_depth,
     97     uint32_t       core2MWMR_fifo_depth)
     98}}}
     99
     100=== TLM-DT Ports ===
     101 * std::vector<tlm_utils::simple_target_socket_tagged<Tc1700,32,tlm::tlm_base_protocol_types> *> '''p_config''': configuration port
     102 * std::vector<tlm_utils::simple_target_socket_tagged<Tc1700,32,tlm::tlm_base_protocol_types> *> '''p_status''': status port
     103 * std::vector<tlm_utils::simple_initiator_socket_tagged<Tc1700,32,tlm::tlm_base_protocol_types> *> '''p_MWMR2core_fifo''': port from the MWMR controller to the Tc4200
     104 * std::vector<tlm_utils::simple_initiator_socket_tagged<Tc1700,32,tlm::tlm_base_protocol_types> *> '''p_core2MWMR_fifo''': port from the Tc4200 to the MWMR controller
     105 
     106
     107== 4) Limitation ==
    83108
    84109This model has the following two limitations:
     
    88113The number of performed iterations is fixed to a reasonable value still offering close-to-ideal Bit Error Rate (BER) performances. Please contact [http://www.turboconcept.com TurboConcept] for information about these limitations.
    89114
    90 == 6) License ==
     115== 5) License ==
    91116
    92117The VCI wrapper is licensed under the SoCLib, GNU LGPLv2.1 license.
     
    96121This internal hardware decoder is distributed in a binary form.
    97122
    98 == 7) RTL model ==
     123== 6) RTL model ==
    99124
    100125Please contact [http://www.turboconcept.com TurboConcept] for information about purchasing a fully functional RTL model of the internal hardware decoder.