Changes between Version 14 and Version 15 of Component/Vci Avalon Bus
- Timestamp:
- Jan 20, 2009, 9:56:15 PM (15 years ago)
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Component/Vci Avalon Bus
v14 v15 24 24 * dynamic bus sizing 25 25 * interrupt requests 26 26 27 27 A n AVALON bus instanciates the three following components :28 Address decoding logic, !ADL in the system interconnect fabric distributes an appropriate address and produces a chipselect signal for each slave. 28 29 29 Address decoding logic (ADL) (AvalonAddressDecodingLogic) in the system interconnect fabric distributes an appropriate address and produces a chipselect signal for each slave. 30 31 Datapath multiplexing (MUX) (AvalonMux) in the system interconnect fabric drives the ''writedata'' signal from the granted master to the selected slave, and the ''readdata'' signal from the selected slave back to the requesting master. 30 Datapath multiplexing, !MUX (!AvalonMux) in the system interconnect fabric drives the ''writedata'' signal from the granted master to the selected slave, and the ''readdata'' signal from the selected slave back to the requesting master. 32 31 33 32 Multiple Avalon masters can simultaneously perform transfers with independent slaves. The system interconnect fabric provides shared access to slaves using a technique