Changes between Version 1 and Version 2 of Component/Vci Avalon Bus


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Timestamp:
Jan 20, 2009, 2:46:12 PM (15 years ago)
Author:
irisa
Comment:

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  • Component/Vci Avalon Bus

    v1 v2  
    55== 1) Functional Description ==
    66
     7This hardware component is a generic Avalon switchfabric that interconnects ''Nb_Master'' Avalon masters and ''Nb_Slave'' Avalon slaves. The master-to-slave relationship can be one-to-one, one-to-many, many-to-one, or many-to-many. Masters and slaves have the same data and address widths and  operate  in the same clock domain.
     8
     9VCI-Avalon wrappers do not require to support full Avalon features, so not all Avalon slave and master ports are supported ([wiki:Component/AvalonSwitchMaster AvalonSwitchMaster], [wiki:Component/AvalonSwitchSlave AvalonSwitchSlave]).
     10
     11Implemented functionnalities :
     12 * fundamental read, fundamental write  with variable wait-state
     13 * burst transfer 
     14 * flow control (dataavailable)
     15 * round robin arbitration
    716
    817== 2) Component definition & usage ==