Changes between Version 3 and Version 4 of Component/Vci Avalon Bus

Timestamp:

Jan 20, 2009, 3:04:34 PM (15 years ago)

Author:

irisa

Comment:

--

Component/Vci Avalon Bus

@@ -5 +5 @@
 == 1) Functional Description ==
 
-This hardware component is a generic Avalon switchfabric allowing the interconnection of ''Nb_Master'' Avalon masters and ''Nb_Slave'' Avalon slaves. The master-to-slave relationship can be one-to-one, one-to-many, many-to-one, or many-to-many. Masters and slaves have the same data and address widths and  operate  in the same clock domain.
+This hardware component is a generic Avalon switch fabric allowing the interconnection of ''Nb_Master'' Avalon masters and ''Nb_Slave'' Avalon slaves. The master-to-slave relationship can be one-to-one, one-to-many, many-to-one, or many-to-many. Masters and slaves have the same data and address widths and  operate  in the same clock domain.
 
 VCI-Avalon wrappers do not require to support full Avalon features, so not all Avalon slave and master ports are supported ([wiki:Component/AvalonSwitchMaster AvalonSwitchMaster], [wiki:Component/AvalonSwitchSlave AvalonSwitchSlave]).
@@ -23 +23 @@
  * dynamic bus sizing  
  * interrupt requests
+
+An AVALON bus instanciates the three following components : 
+
+Address decoding logic (ADL)  (AvalonAddressDecodingLogic)  in the system interconnect fabric distributes an appropriate address and produces a chipselect signal for each slave.
+
+Datapath multiplexing (MUX) (AvalonMux) in the system interconnect fabric drives the ''writedata'' signal from the granted master to the selected slave, and the ''readdata'' signal from the selected slave back to the requesting master.
+
+Multiple Avalon masters can simultaneously perform transfers with independent slaves. The system interconnect fabric provides shared access to slaves using a technique
+called slave-side arbitration. Slave-side arbitration moves the arbitration logic (Arbiter) (AvalonArbiter) close to the slave, such that the algorithm that determines which master gains access to a specific slave in the event that multiple masters attempt to access the same slave at the same time. The arbiter grants shares in a round-robin order. 
+
+AvalonSwitchConfig describes the implemented switch fabric.
 
 == 2) Component definition & usage ==
@@ -44 +55 @@
  * sc_in<bool> '''p_resetn''' :                   Global system reset
  * sc_in<bool> '''p_clk''' :                      Global system clock
- * AvalonSwitch_Master *  p_avalon_master:        Nb_Master ports from Avalon masters
- * AvalonSwitch_Slave  *  p_avalon_slave:         Nb_Slave ports to Avalon slaves
+ * AvalonSwitch_Master ''*p_avalon_master'':        Nb_Master ports from Avalon masters
+ * AvalonSwitch_Slave  ''*p_avalon_slave'':         Nb_Slave ports to Avalon slaves
+
+=== CABA Implementation Notes ===
+
+
 
 == 4) TLM-T implementation ==