Changes between Version 25 and Version 26 of Component/Vci Block Device

Timestamp:

Sep 30, 2015, 12:01:23 PM (9 years ago)

Author:

alain

Comment:

--

Component/Vci Block Device

@@ -13 +13 @@
  * It is acting as an initiator to do the transfer
 
-There is only one block device handled by this component. Both read and write
-transfers are supported.
+There is only one block device handled by this component. Both read and write transfers are supported.
 An IRQ is optionally asserted when transfer is completed.
 
@@ -20 +19 @@
 as a default target.
 
-It contains 8 memory-mapped registers:
+It contains 9 memory-mapped, 32 bits registers:
 
  * '''BLOCK_DEVICE_BUFFER''' (read/write)
-Physical address of the source (or destination) buffer in SoC memory.
+Physical address 32 LSB bits of the source (or destination) buffer in SoC memory.
+
+ * '''BLOCK_DEVICE_BUFFER_EXT''' (read/write)
+Physical address 32 MSB bits of the source (or destination) buffer in SoC memory.
+This register is only used in platform where the physical address width is larger than 32 bits.
 
  * '''BLOCK_DEVICE_COUNT''' (read/write)