Changes between Version 6 and Version 7 of Component/Vci Chbuf Dma

Timestamp:

Oct 19, 2015, 3:16:14 PM (9 years ago)

Author:

alain

Comment:

--

Component/Vci Chbuf Dma

@@ -37 +37 @@
 
 Each channel [k] has 10 memory-mapped 32 bits registers: 
- * CHBUF_RUN[k]       (write-only) : channel is activated when writing a non-zero value
- * CHBUF_STATUS[k]    (read-only)  : channel status
+ * CHBUF_RUN[k]       (write-only) : channel running modes (see below)
+ * CHBUF_STATUS[k]    (read-only)  : channel status (see below)
  * CHBUF_SRC_DESC[k]  (read/write) : SRC chbuf descriptor 32 LSB bits physical address
  * CHBUF_DST_DESC[k]  (read/write) : DST chbuf descriptor 32 LSB bits physical address
@@ -52 +52 @@
  * The 5 bits ADDRESS[4:0] define the target register.
  * The 3 bits ADDRESS[14:12] define the selected channel.
+
+For each channel, various running modes can be set by writing in the CHBUF_RUN register:
+ || Running Mode             || value ||                                           ||
+ || MODE_IDLE                || 0     || soft reset request                        ||
+ || MODE_NORMAL              || 1     || Both SRC & DST buffers status are checked ||
+ || MODE_NO_SRC_SYNC         || 2     || SRC buffer status is not checked          ||
+ || MODE_NO_DST_SYNC         || 4     || DST buffer status is not checked          ||
 
 For each channel, the relevant values for the channel status are the following: