Changes between Version 9 and Version 10 of Component/Vci Dma

Timestamp:

Nov 11, 2009, 6:19:31 PM (14 years ago)

Author:

alain

Comment:

--

Component/Vci Dma

@@ -13 +13 @@
 There is only one DMA context handled at a time.
 An IRQ is optionally asserted when transfer is finished.
-This hardware component cheks for segmentation violation, and can be used
+This hardware component checks for segmentation violation, and can be used
 as a default target.
 
@@ -26 +26 @@
  * `DMA_LEN` (Read / Write)
 It defines the length of transfer, in bytes. This register must be written after writing into 
-registers DAMA_SRC & DMADSR, as the writing into the DMA_LEN register starts the transfer. 
+registers DAMA_SRC & DMA_DST, as the writing into the DMA_LEN register starts the transfer. 
 This register gets back to 0 when transfer is finished.
 This register can be used to test the DMA coprocessor status.
@@ -69 +69 @@
 See [wiki:SoclibCc/VciParameters SoclibCc/VciParameters]
 {{{
-Uses( 'vci_dma', **vci_parameters )
+Uses( 'vci_dma' )
 }}}
 
@@ -83 +83 @@
 VciDma(
      sc_module_name name,   //  Component Name
-     const soclib::common::IntTab & index,  // Target index
      const soclib::common::MappingTable &mt,   // MappingTable
+     const soclib::common::IntTab &srcid,  // Initiator index
+     const soclib::common::IntTab &tgtid,  // Target index
      const size_t burst_size );   //  Number of bytes transfered in a burst
 }}}
@@ -96 +97 @@
  * sc_out<bool> '''p_irq''' : Interrupt port
 
-== 4) TLM-T implementation ==
+== 4) TLM-DT implementation ==
 
-The TLM-T implementation is not available yet.
+The TLM-DT implementation is not available yet.