Changes between Version 10 and Version 11 of Component/Vci Dma


Ignore:
Timestamp:
Nov 11, 2009, 6:21:46 PM (14 years ago)
Author:
alain
Comment:

--

Legend:

Unmodified
Added
Removed
Modified

  • Component/Vci Dma

    v10 v11  
    1818This component has 4 memory-mapped registers :
    1919
    20  * `DMA_SRC` (Read / Write)
     20 * '''DMA_SRC''' (Read / Write)
    2121It defines the physical address of the source buffer.
    2222
    23  * `DMA_DST` (Read / Write)
     23 * '''DMA_DST''' (Read / Write)
    2424It defines the physical address of the destination buffer.
    2525
    26  * `DMA_LEN` (Read / Write)
     26 * '''DMA_LEN''' (Read / Write)
    2727It defines the length of transfer, in bytes. This register must be written after writing into
    2828registers DAMA_SRC & DMA_DST, as the writing into the DMA_LEN register starts the transfer.
    … …  
    3030This register can be used to test the DMA coprocessor status.
    3131
    32  * `DMA_RESET` (Write-only)
     32 * '''DMA_RESET''' (Write-only)
    3333Writing any value into this pseudo-register makes a clean re-initialisation of the DMA coprocessor:
    3434The on-going VCI transaction is completed before the coprocessor returns the IDLE state.
    3535This write access must be used by the software ISR to aknowledge the DMA IRQ.
    3636
    37  * `DMA_IRQ_DISABLED` (Read / Write)
     37 * '''DMA_IRQ_DISABLED''' (Read / Write)
    3838 A non zero value disables the IRQ line. The RESET value is zero.
    3939