Changes between Version 8 and Version 9 of Component/Vci Dma

Timestamp:

Feb 11, 2008, 6:48:29 PM (17 years ago)

Author:

alain

Comment:

--

Component/Vci Dma

@@ -18 +18 @@
 This component has 4 memory-mapped registers :
 
- * `DMA_SRC`
-The physical address of the source buffer.
+ * `DMA_SRC` (Read / Write)
+It defines the physical address of the source buffer.
 
- * `DMA_DST`
-The physical address of the destination buffer.
+ * `DMA_DST` (Read / Write)
+It defines the physical address of the destination buffer.
 
- * `DMA_LEN`
-Length of transfer, in bytes. Writing to this register initiates the transfer, you should write to it after src and dst.
+ * `DMA_LEN` (Read / Write)
+It defines the length of transfer, in bytes. This register must be written after writing into 
+registers DAMA_SRC & DMADSR, as the writing into the DMA_LEN register starts the transfer. 
 This register gets back to 0 when transfer is finished.
+This register can be used to test the DMA coprocessor status.
 
- * `DMA_IRQ_ENABLED`
-  * Writing a non zero value enables the IRQ line.
-  * Writing a zero value resets the IRQ.
-  * Reading a zero value indicates the completion of the transfer
+ * `DMA_RESET` (Write-only)
+Writing any value into this pseudo-register makes a clean re-initialisation of the DMA coprocessor:
+The on-going VCI transaction is completed before the coprocessor returns the IDLE state.
+This write access must be used by the software ISR to aknowledge the DMA IRQ.
+
+ * `DMA_IRQ_DISABLED` (Read / Write)
+ A non zero value disables the IRQ line. The RESET value is zero.
 
 For extensibility issues, you should access the DMA using globally-defined offsets.
 
 You should include file `soclib/dma.h` from your software, it
-defines `DMA_SRC`, `DMA_DST`, `DMA_LEN`, `DMA_IRQ_ENABLED`.
+defines `DMA_SRC`, `DMA_DST`, `DMA_LEN`, `DMA_RESET`, `DMA_IRQ_DISABLED`.
 
 Sample code: