Changes between Version 7 and Version 8 of Component/Vci Dspin Initiator Wrapper
- Timestamp:
- Feb 10, 2008, 12:01:56 AM (17 years ago)
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Component/Vci Dspin Initiator Wrapper
v7 v8 3 3 = !VciDspinInitiatorWrapper = 4 4 5 == Functional Description ==5 == 1) Functional Description == 6 6 7 7 This hardware component connect a VCI initiator to a DSPIN micronetwork. It can be used in conjunction with the [wiki:Component/VciDspinTargetWrapper VciDspinTargetWrapper] and the [wiki:Component/DspinRouter DspinRouter] components to build a VCI compliant DSPIN micro-network. 8 8 It translates the VCI packet format to the DSPIN packet format. 9 9 10 The DSPIN network on chip is a distributed network, with a 2D mesh topology. It has been designed for shared memory clusterized, 11 multi-processors architectures. It supports the GALS (Globally Asynchronous Locally Synchronous) approach. 12 13 == Component definition == 10 == 2) Component definition & usage == 14 11 15 == Usage==12 == 3) CABA Implementation == 16 13 17 == CABA Implementation==14 === CABA sources === 18 15 19 16 * interface : source:trunk/soclib/soclib/module/network_component/vci_dspin_initiator_wrapper/caba/source/include/vci_dspin_initiator_wrapper.h 20 17 * implementation : source:trunk/soclib/soclib/module/network_component/vci_dspin_initiator_wrapper/caba/source/src/vci_dspin_initiator_wrapper.cc 21 18 22 == TLM-T implementation == 19 === CABA Constructor parameters === 20 21 === CABA Ports === 22 23 == 4) TLM-T implementation == 23 24 24 25 There is no TLM-T implementation for the DSPIN network. 25 (You can use the [wiki:Component/VciVgmn VciVgmn] generic interconnect)26 (You can use the [wiki:Component/VciVgmn VciVgmn] generic micro-network) 26 27 27 == Template parameters ==28 29 == Constructor parameters ==30 31 == Ports ==32