Changes between Version 8 and Version 9 of Component/Vci Dspin Target Wrapper
- Timestamp:
- Feb 10, 2008, 12:05:09 AM (17 years ago)
Legend:
- Unmodified
- Added
- Removed
- Modified
-
Component/Vci Dspin Target Wrapper
v8 v9 3 3 = !VciDspinTargetWrapper = 4 4 5 == Functional Description ==5 == 1) Functional Description == 6 6 7 7 This hardware component connects a VCI target to a DSPIN micro-network. It can be used in conjunction with the [wiki:Component/VciDspinInitiatorWrapper VciDspinInitiatorWrapper] and the [wiki:Component/DspinRouter DspinRouter] components to build a VCI compliant DSPIN micro-network. It translates the VCI packet format to the DSPIN packet format. 8 8 9 == 2) Component definition & usage == 9 10 10 The DSPIN network on chip is a distributed network, with a 2D mesh topology. It has been designed for shared memory clusterized, 11 multi-processors architectures. It supports the GALS (Globally Asynchronous Locally Synchronous) approach. 12 13 == Component definition == 11 == 3) CABA Implementation == 14 12 15 == Usage == 16 17 == CABA Implementation == 13 === CABA sources === 18 14 19 15 * interface : source:trunk/soclib/soclib/module/network_component/vci_dspin_initiator_wrapper/caba/source/include/vci_dspin_target_wrapper.h 20 16 * implementation : source:trunk/soclib/soclib/module/network_component/vci_dspin_initiator_wrapper/caba/source/src/vci_dspin_target_wrapper.cc 21 17 22 == TLM-T implementation == 18 === CABA Constructor parameters === 19 20 === CABA Ports === 21 22 == 4) TLM-T implementation == 23 23 24 24 There is no TLM-T implementation for the DSPIN network. 25 (You can use the [wiki:Component/VciVgmn VciVgmn] generic interconnect)25 (You can use the [wiki:Component/VciVgmn VciVgmn] generic micro-network) 26 26 27 == Template parameters ==28 27 29 == Constructor parameters ==30 28 31 == Ports ==32