| 1 | = Functional Description = |
| 2 | |
| 3 | This VCI target is a memory mapped peripheral implementing |
| 4 | a vectorized interrupt controller. It can concentrate up |
| 5 | to 32 independent interrupt lines '''p_irq_in[i]''' to a single |
| 6 | '''p_irq''' interrupt line. |
| 7 | The active state is high, and the output interrupt '''p_irq is the logical OR of all |
| 8 | input interrupts '''p_irq_in[i]'''. |
| 9 | Each input interrupt '''p_irq_in[i]''' can be individually masked |
| 10 | using a memory mapped 32 bits register . |
| 11 | This component can return the index of the highest priority |
| 12 | active interrupt '''p_irq_[i]'''. |
| 13 | The priority scheme is fixed : The lower indexes have the highest priority. |
| 14 | The memory segment allocated to this component must be aligned |
| 15 | on 8 bytes boundary. |
| 16 | This hardware component cheks for segmentation violation, and can be used |
| 17 | as a default target. |
| 18 | |
| 19 | This component contains 2 memory mapped registers: |
| 20 | |
| 21 | * '''ICU_INDEX''' : ADDRESS![2:0] = 0x0 |
| 22 | It is actually a 32 bits pseudo-register: A read request |
| 23 | returns the index value of the highest priority active input interrupt. |
| 24 | If there is no active interrupt, it returns the 32 value. |
| 25 | This register is read-only. |
| 26 | |
| 27 | * '''ICU_MASK''' : ADDRESS![2:0] = 0x4 |
| 28 | Each bit i of this 32 bits register enables the corresponding |
| 29 | '''p_irq_in[i]''' input interrupt, when this bit is one. |
| 30 | This register can be read or written.A write request of a zero gives resets this register. |
| 31 | This register is write-only. |
| 32 | |
| 33 | = CABA Implementation = |
| 34 | |
| 35 | The caba implementation is in |
| 36 | * source:trunk/soclib/systemc/include/caba/target/vci_icu.h |
| 37 | * source:trunk/soclib/systemc/src/caba/target/vci_icu.cc |
| 38 | |
| 39 | == Template parameters: == |
| 40 | * The VCI parameters |
| 41 | |
| 42 | == Constructor parameters == |
| 43 | {{{ |
| 44 | VciIcu( |
| 45 | sc_module_name name, // Component Name |
| 46 | const soclib::common::InTab &index, // Target index |
| 47 | const soclib::common::MappingTable &mt, // Mapping Table |
| 48 | size_t nirq); // Number of input interrupts |
| 49 | }}} |
| 50 | |
| 51 | == Ports == |
| 52 | * sc_in<bool> p_resetn : Global system reset |
| 53 | * sc_in<bool> p_clk : Global system clock |
| 54 | * soclib::caba::VciTarget<vci_param> p_vci : VCI port |
| 55 | * sc_out<bool> p_irq : Output interrupt port |
| 56 | * sc_in<bool> *p_irq_in : pointer to the input interrupts ports table |