[wiki:Component SocLib Components General Index] 

= !VciLocalRingNetwork =

== 1) Functional Description ==
This hardware component is a VCI compliant ring, implemented as a combinational daisy-chain and well suited for FPGA implementations. It must only be used in clusterized architecture, to interconnect a limited number of VCI initiators and targets in a local sub-system. It contains two independant rings for VCI commands and VCI responses and is composed of three components :

 * [wiki:Component/VciRingInitiatorWrapper VciRingInitiatorWrapper] : A VCI-RING protocol converter for a VCI initiator.
 * [wiki:Component/VciRingTargetWrapper VciRingTargetWrapper]       : A VCI-RING protocol converter for a VCI target.
 * [wiki:Component/RingGateway RingGateway]                         : A ring interface with global interconnect. 

== 2) Component definition & usage ==

source:trunk/soclib/soclib/module/network_component/vci_local_ring_network/caba/metadata/vci_local_ring_network.sd

== 3) CABA implementation == 

=== CABA sources ===

 * interface      : source:trunk/soclib/soclib/module/network_component/vci_local_ring_network/caba/source/include/vci_local_ring_network.h
 * implementation : source:trunk/soclib/soclib/module/network_component/vci_local_ring_network/caba/source/src/vci_local_ring_network.cpp 

=== CABA Constructor parameters ===

{{{
VciLocalRingNetwork( sc_module_name insname,                      // instance name
                         const soclib::common::MappingTable &mt,  // mapping table
                         const soclib::common::IntTab &ringid,    // global subsystem index
                         const int &wrapper_fifo_depth,           // wrapper fifo depth
                         const int &half_gateway_fifo_depth,      // half gateway fifo depth
                         int nb_attached_initiator,               // number of VCI initiators
                         int nb_attached_target);                 // number of VCI targets
}}}


=== CABA ports ===

 * sc_in<bool>                             p_clk;             // Global system clock
 * sc_in<bool>                             p_resetn;          // Global system reset
 * soclib::caba::!VciInitiator<vci_param>* p_to_target;       // Ports to VCI targets
 * soclib::caba::!VciTarget<vci_param>   * p_to_initiator;    // Ports to VCI initiators
 * soclib::caba::!GateInitiator            p_gate_initiator;  // Port to gate target  
 * soclib::caba::!GateTarget               p_gate_target;     // Port to gate initiator

== 4) TLMT implementation ==

The TLM-T implementation is not available yet.