Changes between Version 17 and Version 18 of Component/Vci Master Nic
- Timestamp:
- Jul 26, 2020, 2:09:47 PM (5 years ago)
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Component/Vci Master Nic
v17 v18 12 12 13 13 To improve the throughput, this component supports up to 8 channels. 14 These channels are indexed by an index derived from the (source) remote IP address and port for the received (RX) packets, 15 and from the (destination) remote IP address and port for the sent (TX) packets: 14 These channels are indexed by a ''key'' derived from the (source) remote IP address and port for the received (RX) packets, and from the (destination) remote IP address and port for the sent (TX) packets: 16 15 {{{ 17 16 uint32_t key = ( ((addr ) & 0xFF) + … … 29 28 containing one single Ethernet packet. 30 29 31 The received packets (RX) and the sent packets (TX) are stored in 32 two memory mapped software queues, called chained buffers, and defined by the ''nic_chbuf_s'' C structure. The number of containers, defining the queue depth, is a software defined parameter. 30 The received packets (RX) and the sent packets (TX) are stored in two memory mapped software queues, called ''chained buffer'', and defined by the '''nic_chbuf_s'' C structure. Each slot in the queue is a ''container''. The number of containers, defining the queue depth, is a software defined parameter. 33 31 The physical addresses are used by the hardware NIC DMA engines. 34 32 The virtual addresses are used by the software NIC drivers. … … 43 41 }}} 44 42 45 Each container contain one single Ethernet Packet. 46 The ''nic_cont_s'' C structure contains a 2040 bytes data buffer, the actual packet length, and 47 the container state : full (owned by the reader) / empty (owned by the writer). 43 The '''nic_cont_s''' C structure contains a 2040 bytes data buffer, the actual ethernet packet length (in bytes), and the container state : full (owned by the reader) / empty (owned by the writer). 48 44 Thist state variable is used as a SET/RESET flip-flop to synchronize the software server thread, and the hardware NIC DMA engine. 45 {{{ 49 46 struct nic_cont_s 50 {{{51 47 { 52 48 uint8_t buf[2040]; /*! Ethernet packet (42 to 2040 bytes */ … … 71 67 * the is_rx bit is sent in TRDID[2] 72 68 73 Regarding the GMII physical interface, th issimulation model supports three modes69 Regarding the GMII physical interface, the systemC simulation model supports three modes 74 70 of operation, defined by a constructor parameter: 75 71 * '''NIC_MODE_FILE''': Both the RX packets stream an the TX packets stream are read/written from/to dedicated files "nic_rx_file.txt" and "nic_tx_file.txt", stored in the same directory as the top.cpp file.