Changes between Version 19 and Version 20 of Component/Vci Master Nic
- Timestamp:
- Jul 26, 2020, 2:15:53 PM (5 years ago)
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Component/Vci Master Nic
v19 v20 28 28 containing one single Ethernet packet. 29 29 30 === 1.1 Software queues === 31 30 32 The received packets (RX) and the sent packets (TX) are stored in two memory mapped software FIFO queues, called ''chained buffer'', and defined by the '''nic_chbuf_s''' C structure. Each slot in the queue is a ''container''. The number of containers, defining the FIFO depth, is a software defined parameter. 31 33 … … 42 44 The physical addresses are used by the hardware NIC DMA engines. 43 45 The virtual addresses are used by the software NIC drivers. 46 47 === 1.2 Container format === 44 48 45 49 The '''nic_cont_s''' C structure contains a 2040 bytes data buffer, the actual ethernet packet length (in bytes), and the container state : full (owned by the reader) / empty (owned by the writer).