Changes between Version 3 and Version 4 of Component/Vci Master Nic


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Timestamp:
Oct 9, 2019, 8:54:04 PM (5 years ago)
Author:
alain
Comment:

--

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  • Component/Vci Master Nic

    v3 v4  
    2222 * '''NIC_MODE_TAP''': The TX and RX packet streams are send and received to and from the physical network controller of the workstation running the simulation.
    2323
    24 The packet length can have any value, from 64 to 1542 bytes.
     24The packet length can have any value, from 60 to 1514 bytes.
    2525
    2626The minimal data transfer unit between software and the NIC is a 4K bytes '''container''',
    … …  
    7979These registers are used for global NIC configuration or status, and are not linked to a specific channel.
    8080
    81 ||'''NIC_G_CHANNELS'''          ||Read Only || Returns actual number of channels      ||
    82 ||'''NIC_G_BC_ENABLE'''         ||Read/Write|| Enable Broadcast if non zero           ||
    83 ||'''NIC_G_PERIOD'''            ||Read/Write|| container status polling period        ||
    84 ||'''NIC_G_MAC_4                ||Read/Write|| MAC address 32 LSB bits                ||
    85 ||'''NIC_G_MAC_2                ||Read/Write|| MAC address 16 MSB bits                ||
    86 ||'''NIC_G_NPKT_RESET           ||Write Only|| reset all packets counters             ||
    87  
    88     NIC_G_NPKT_RX_G2S_RECEIVED       = 10,  // number of packets received on GMII RX port
    89     NIC_G_NPKT_RX_G2S_DISCARDED      = 11,  // number of RX packets discarded by RX_G2S FSM
    90 
    91     NIC_G_NPKT_RX_DES_SUCCESS        = 12,  // number of RX packets transmited by RX_DES FSM
    92     NIC_G_NPKT_RX_DES_TOO_SMALL      = 13,  // number of discarded too small RX packets (<60B)
    93     NIC_G_NPKT_RX_DES_TOO_BIG        = 14,  // number of discarded too big RX packets (>1514B)
    94     NIC_G_NPKT_RX_DES_MFIFO_FULL     = 15,  // number of discarded RX packets if fifo full
    95     NIC_G_NPKT_RX_DES_CRC_FAIL       = 16,  // number of discarded RX packets if CRC32 failure
    96 
    97     NIC_G_NPKT_RX_DISPATCH_RECEIVED  = 17,  // number of packets received by RX_DISPATCH FSM
    98     NIC_G_NPKT_RX_DISPATCH_BROADCAST = 18,  // number of broadcast RX packets received
    99     NIC_G_NPKT_RX_DISPATCH_DST_FAIL  = 19,  // number of discarded RX packets if DST MAC not found
    100     NIC_G_NPKT_RX_DISPATCH_CH_FULL   = 20,  // number of discarded RX packets if channel full
    101 
    102     NIC_G_NPKT_TX_DISPATCH_RECEIVED  = 41,  // number of packets received by TX_DISPATCH FSM
    103     NIC_G_NPKT_TX_DISPATCH_TOO_SMALL = 42,  // number of discarded too small TX packets (<60B)
    104     NIC_G_NPKT_TX_DISPATCH_TOO_BIG   = 43,  // number of discarded too big TX packets (>1514B)
    105     NIC_G_NPKT_TX_DISPATCH_TRANSMIT  = 44,  // number of transmit TX packets
    106 
     81||'''NIC_G_CHANNELS'''                  ||Read Only || returns actual number of channels         ||
     82||'''NIC_G_BC_ENABLE'''                 ||Read/Write|| enable Broadcast if non zero              ||
     83||'''NIC_G_PERIOD'''                    ||Read/Write|| container status polling period           ||
     84||'''NIC_G_MAC_4'''                     ||Read/Write|| MAC address 32 LSB bits                   ||
     85||'''NIC_G_MAC_2'''                     ||Read/Write|| MAC address 16 MSB bits                   ||
     86||'''NIC_G_NPKT_RESET'''                ||Write Only|| reset all packets counters                ||
     87||                                      ||          ||                                           ||
     88||'''NIC_G_NPKT_RX_G2S_RECEIVED'''      ||Read_Only || packets received on GMII RX port          ||
     89||'''NIC_G_NPKT_RX_G2S_DISCARDED'''     ||Read Only || RX packets discarded by RX_G2S FSM        ||
     90||                                      ||          ||                                           ||
     91||'''NIC_G_NPKT_RX_DES_SUCCESS'''       ||Read Only || RX packets transmited by RX_DES FSM       ||    ||'''NIC_G_NPKT_RX_DES_TOO_SMALL'''     ||Read Only || discarded too small RX packets (<60B)     ||
     92||'''NIC_G_NPKT_RX_DES_TOO_BIG'''       ||Read Only || discarded too big RX packets (>1514B)     ||
     93||'''NIC_G_NPKT_RX_DES_MFIFO_FULL'''    ||Read Only || discarded RX packets if fifo full         ||
     94||'''NIC_G_NPKT_RX_DES_CRC_FAIL'''      ||Read Only || discarded RX packets if CRC32 failure     ||
     95||                                      ||          ||                                           ||
     96||'''NIC_G_NPKT_RX_DISPATCH_RECEIVED''' ||Read Only || packets received by RX_DISPATCH FSM       ||
     97||'''NIC_G_NPKT_RX_DISPATCH_BROADCAST'''||Read Only || broadcast RX packets received             ||
     98||'''NIC_G_NPKT_RX_DISPATCH_DST_FAIL''' ||Read Only || discarded RX packets if DST MAC not found ||
     99||'''NIC_G_NPKT_RX_DISPATCH_CH_FULL'''  ||Read Only || discarded RX packets if channel full      ||
     100||                                      ||          ||                                           ||
     101||'''NIC_G_NPKT_TX_DISPATCH_RECEIVED''' ||Read Only || packets received by TX_DISPATCH FSM       ||
     102||'''NIC_G_NPKT_TX_DISPATCH_TOO_SMALL'''||Read Only || discarded too small TX packets (<60B)     ||
     103||'''NIC_G_NPKT_TX_DISPATCH_TOO_BIG'''  ||Read Only || discarded too big TX packets (>1514B)     ||
     104||'''NIC_G_NPKT_TX_DISPATCH_TRANSMIT''' ||Read Only || transmited TX packets                     ||
    107105
    108106=== 2.2) Channel registers ===
    109107
    110 These registers are replicated
     108These registers are replicated for each channel.
     109||'''NIC_RX_CHANNEL_RUN'''              ||Write Only|| channel activation                        ||
     110||'''NIC_RX_CHBUF_DESC_LO'''            ||Read/Write|| RX chbuf descriptor low word              ||
     111||'''NIC_RX_CHBUF_DESC_HI'''            ||Read/Write|| RX chbuf descriptor high word             ||
     112||'''NIC_RX_CHBUF_NBUFS'''              ||Read/WRITE|| RX chbuf depth (buffers)                  ||
     113||'''NIC_RX_CHANNEL_STATE'''            ||Read Only || RX channel status                         ||       
     114||                                      ||          ||                                           ||
     115||'''NIC_TX_CHANNEL_RUN'''              ||Write Only|| TX channel activation                     ||
     116||'''NIC_TX_CHBUF_DESC_LO'''            ||Read/Write|| TX chbuf descriptor low word              ||
     117||'''NIC_TX_CHBUF_DESC_HI'''            ||Read/Write|| TX chbuf descriptor high word             ||
     118||'''NIC_TX_CHBUF_NBUFS'''              ||Read/Write|| TX chbuf depth (buffers)                  ||
     119||'''NIC_TX_CHANNEL_STATE'''            ||Read Only || TX channel status                         ||
    111120
    112121
    113 On top of the channels segments is the hypervisor segment, taking 4 Kbytes,
    114 and containing the global configuration registers: (all read/write).
    115 In a virtualized environment, the corresponding page should not be mapped
    116 in the virtual machines address spaces, as it should not accessed by the virtual machines.
    117 || Register name         || function                                       || Reset value  ||
    118 || NIC_G_VIS             || bitfield / bit N = 0 -> channel N is disabled  || all inactive ||
    119 || NIC_G_ON              || NIC active if non zero (inactive at reset)     || inactive     ||
    120 || NIC_G_BC_ENABLE       || boolean / broadcast enabled if true            || disabled     ||
    121 || NIC_G_TDM_ENABLE      || boolean / enable TDM dor TX if true            || disabled     ||
    122 || NIC_G_TDM_PERIOD      || value of TDM time slot                         ||              ||
    123 || NIC_G_PYPASS_ENABLE   || boolean / enable bypass for TX if true         || enabled      ||
    124 || NIC_G_MAC_4[8]        || default MAC address 32 LSB bits for channel[i] ||              ||
    125 || NIC_G_MAC_2[8]        || default MAC address 16 LSB bits for channel[i] ||              ||
    126122
    127 The Hypervisor segment contains also various event counters for statistics (read/write)
    128123
    129 || NIC_G_NPKT_RX_G2S_RECEIVED       || number of packets received on GMII RX port      ||
    130 || NIC_G_NPKT_RX_G2S_DISCARDED      || number of RX packets discarded by RX_G2S FSM    ||
    131 ||                                  ||                                                 ||
    132 || NIC_G_NPKT_RX_DES_SUCCESS        || number of RX packets transmited by RX_DES FSM   ||
    133 || NIC_G_NPKT_RX_DES_TOO_SMALL      || number of discarded too small RX packets        ||
    134 || NIC_G_NPKT_RX_DES_TOO_BIG        || number of discarded too big RX packets          ||
    135 || NIC_G_NPKT_RX_DES_MFIFO_FULL     || number of discarded RX packets for fifo full    ||
    136 || NIC_G_NPKT_RX_DES_CRC_FAIL       || number of discarded RX packets for checksum     ||
    137 ||                                  ||                                                 ||
    138 || NIC_G_NPKT_RX_DISPATCH_RECEIVED  || number of packets received by RX_DISPATCH FSM   ||
    139 || NIC_G_NPKT_RX_DISPATCH_BROADCAST || number of broadcast RX packets received         ||
    140 || NIC_G_NPKT_RX_DISPATCH_DST_FAIL  || number of discarded RX packets for DST MAC      ||
    141 || NIC_G_NPKT_RX_DISPATCH_CH_FULL   || number of discarded RX packets for channel full ||
    142 ||                                  ||                                                 ||
    143 || NIC_G_NPKT_TX_DISPATCH_RECEIVED  || number of packets received by TX_DISPATCH FSM   ||
    144 || NIC_G_NPKT_TX_DISPATCH_TOO_SMALL || number of discarded too small TX packets        ||
    145 || NIC_G_NPKT_TX_DISPATCH_TOO_BIG   || number of discarded too big TX packets          ||
    146 || NIC_G_NPKT_TX_DISPATCH_SRC_FAIL  || number of discarded TX packets because SRC MAC  ||
    147 || NIC_G_NPKT_TX_DISPATCH_BROADCAST || number of broadcast TX packets received         ||
    148 || NIC_G_NPKT_TX_DISPATCH_BYPASS    || number of bypassed TX->RX packets               ||
    149 || NIC_G_NPKT_TX_DISPATCH_TRANSMIT  || number of transmit TX packets                   ||
    150124
    151125For extensibility issues, you should access all these registers using the globally-defined offsets in file
    152  source:trunk/soclib/soclib/module/connectivity_component/vci_multi_nic/include/soclib/multi_nic.h
     126 source:trunk/soclib/soclib/module/connectivity_component/vci_master_nic/include/soclib/master_nic.h
    153127
    154128This hardware component checks for segmentation violation, and can be used as a default target.
    … …  
    156130== 3) Component definition & usage ==
    157131
    158 source:trunk/soclib/soclib/module/connectivity_component/vci_multi_nic/caba/metadata/vci_master_nic.sd
     132source:trunk/soclib/soclib/module/connectivity_component/vci_master_nic/caba/metadata/vci_master_nic.sd
    159133
    160134{{{
    … …  
    166140=== CABA sources ===
    167141 
    168  * interface : source:trunk/soclib/soclib/module/connectivity_component/vci_multi_nic/caba/source/include/vci_master_nic.h
    169  * implementation : source:trunk/soclib/soclib/module/connectivity_component/vci_multi_nic/caba/source/src/vci_master_nic.cpp
     142 * interface : source:trunk/soclib/soclib/module/connectivity_component/vci_master_nic/caba/source/include/vci_master_nic.h
     143 * implementation : source:trunk/soclib/soclib/module/connectivity_component/vci_master_nic/caba/source/src/vci_master_nic.cpp
    170144
    171145=== CABA Constructor parameters ===
    172146{{{
    173 VciMultiNic(
    174      sc_module_name name,   //  Component Name
    175      const soclib::common::IntTab &tgtid,  // Target index
     147VciMasterNic(
     148     sc_core::sc_module_name name,   //  Component Name
    176149     const soclib::common::MappingTable &mt,   // MappingTable
     150     const soclib::common::IntTab &rx_srcid,  // RX DMA initiator index
     151     const soclib::common::IntTab &tx_srcid,  // TX DMA initiator index
     152     const soclib::common::IntTab &tgtid,  // target index
    177153     const size_t channels,   // Number of channels
    178154     const uint32_t mac4,   //  MAC address 32 LSB bits