Changes between Version 13 and Version 14 of Component/Vci Multi Ahci

Timestamp:

Apr 1, 2015, 8:53:09 AM (10 years ago)

Author:

alain

Comment:

--

Component/Vci Multi Ahci

@@ -86 +86 @@
 ||31||30||29||28 ... 24||23  ......  8||7 ... 1||0||
 ||--||R ||--|| CMD_ID  ||BUFFER_ID    ||-------||D||
-- Bit[0] : set by hardware when at least one command has been completed.
-- Bit[30] : set by hardware when an error has been detected in a command.
-- Bit[28:24] : index of the faulty command in command list.
-- Bit[23:8] : index of the faulty buffer in the faulty command.
+ Bit[0] : set by hardware when at least one command has been completed.
+ Bit[30] : set by hardware when an error has been detected in a command.
+ Bit[28:24] : index of the faulty command in command list.
+ Bit[23:8] : index of the faulty buffer in the faulty command.
 When an error is detected for a command, the R bit is set, the channel FSM stops immediately, without handling the remaining commands in the command list, and keep blocked, waiting for a software reset on this PXIS register.
 
  * '''HBA_PXIE'''
 This register enables and disables the IRQ reporting the completion (success or error) of the commands for a given channel. Only 2 bits are used:
-- Bit 0 : when set, an IRQ is generated when bit0 of AHCI_PXIS is set, 
-- Bit 30 : when set, an IRQ is generated when bit30 of AHCI_PXIS is set,
+ Bit 0 : when set, an IRQ is generated when bit0 of AHCI_PXIS is set, 
+ Bit 30 : when set, an IRQ is generated when bit30 of AHCI_PXIS is set,
 
  * '''HBA_PXCMD'''
-Boolean : The corresponding channel is activated to poll the command list when non zero.
+Boolean : Writing a non zero value activates the polling of the Command List. Writing a zero value makes a soft reset on PXCI, PXIS, PXIE, and PXCMD registers.
 
  * '''HBA_PXCI'''
-Bit-vector, one bit per command in the Command List. These bits are handled as 32 set/reset flip-flops: set by software when a command ha been posted in Command List / reset by hardware when the command is completed.
+Bit-vector, one bit per command in the Command List. These bits are handled as 32 set/reset flip-flops: set by software when a command ha been posted in Command List / reset by hardware when the command is completed. A write command on this register makes a OR between the VCI WDATA field and the current value of the register. 
 
 For extensibility issues, you should access this component using the mnemonics defined [source:trunk/soclib/soclib/module/connectivity_component/vci_multi_ahci/include/soclib/multi_ahci.h here].