Changes between Version 17 and Version 18 of Component/Vci Multi Ahci

Timestamp:

Apr 1, 2015, 9:06:12 AM (9 years ago)

Author:

alain

Comment:

--

Component/Vci Multi Ahci

@@ -94 +94 @@
  * '''HBA_PXIE'''
 This register enables and disables the IRQ reporting the completion (success or error) of the commands for a given channel. Only 2 bits are used:
-||31||30||29 .................................... 1||0||
+||31||30||29 ...................................... 1||0||
 ||--||R ||------------------------------------||D||
- Bit 0 : when set, an IRQ is generated when bit0 of AHCI_PXIS is set, 
- Bit 30 : when set, an IRQ is generated when bit30 of AHCI_PXIS is set,
+ Bit 0 : when set, an IRQ is generated when bit0 of AHCI_PXIS is set. 
+ Bit 30 : when set, an IRQ is generated when bit30 of AHCI_PXIS is set.
 
  * '''HBA_PXCMD'''
@@ -105 +105 @@
 Bit-vector, one bit per command in the Command List. These bits are handled as 32 set/reset flip-flops: set by software when a command ha been posted in Command List / reset by hardware when the command is completed. A write command on this register makes a OR between the VCI WDATA field and the current value of the register. 
 
-For extensibility issues, you should access this component using the mnemonics defined [source:trunk/soclib/soclib/module/connectivity_component/vci_multi_ahci/include/soclib/multi_ahci.h here]. 
+For extensibility issues, you should access this component using these mnemonics (defined [source:trunk/soclib/soclib/module/connectivity_component/vci_multi_ahci/include/soclib/multi_ahci.h here]). 
 
 Even if there is only six registers per channel, each channel sub-segment occupies 4K bytes, and the HBA segment must be aligned on a 32 Kbytes boundary.