Changes between Version 1 and Version 2 of Component/Vci Multi Ahci

Timestamp:

Mar 29, 2015, 12:05:34 PM (9 years ago)

Author:

alain

Comment:

--

Component/Vci Multi Ahci

@@ -16 +16 @@
 that is handled as a software FIFO. For each channel[k], the ''Command List'' can register up to 32
 ''read'' or ''write'' commands, that are handled in pseudo-parallelism by the channel controller.
-This VCI component has a DMA capability, and use it to access the ''Command List'' and to transfer
+This VCI component has a DMA capability, and use it to access both the ''Command List'' and to transfer
 the data to or from memory.
 
@@ -27 +27 @@
 This hardware component checks for segmentation violation, and can be used as a default target.
 
+== 2) Command List ==
+
+For each channel, the VciMultiAhci driver must use two arrays to register commands: The Command Descriptor array (32 entries) define the Command List (software FIFO). Each Command Descriptor occupies 16 bytes, with the following format:
+
+{{{
+typedef struct hba_cmd_desc_s  // size = 16 bytes
+{
+    unsigned char       flag[2];        // only one bit used : WRITE when bit 6 of flag[0] is set 
+    unsigned char       prdtl[2];       // Number of buffers (no more than 16535)
+    unsigned int        prdbc;          // Number of bytes actually transfered
+    unsigned int        ctba;           // Command Table base address 32 LSB bits
+    unsigned int        ctbau;          // Command Table base address 32 MSB bits
+} hba_cmd_desc_t;
+}}}
+
+== 3) Command Table
+
 == 2) Addressable registers ==
 
-Each channel[k] contains seven 32 bits registers:
+Each channel[k] contains six 32 bits read/write registers:
 
- * '''HBA''' (read/write)
-Physical address of the source (or destination) buffer in SoC memory.
+ * '''HBA_PXCLB'''
+32 LSB bits of the Command List array physical address.
 
- * '''BLOCK_DEVICE_COUNT''' (read/write)
-Number of blocks to be transfered.
+ * '''HBA_PXCLBU'''
+32 MSB bits of the Command List array physical address. * 
 
- * '''BLOCK_DEVICE_LBA''' (read/write)
-Logical Base Address (index of the first block in the block device)
+ * '''HBA_PXIS'''
+Channel status, used for error reporting.
+
+ * '''HBA_PXIE'''
+Intcommanderrupt enable.
+
+ * '''HBA_PXCMD'''
+Boolean : running when non zero
+
+ * '''HBA_PXCI'''
+Bit-vector, one bit per command in the Command List. These bits are handled as 32 set/reset flip-flops: set by software when a command ha been posted in Command List / reset by hardware when the command is completed.
 
  * '''BLOCK_DEVICE_OP''' (write only)