Changes between Version 25 and Version 26 of Component/Vci Multi Ahci


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Timestamp:
Oct 31, 2016, 6:39:50 PM (8 years ago)
Author:
alain
Comment:

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  • Component/Vci Multi Ahci

    v25 v26  
    1010The block size must be a power of 2 between 128 and 4096 bytes.
    1111
    12 According to the AHCI specification, each channel[k] controller uses a private ''Command List'' that is handled as a software FIFO. For each channel[k], the associated ''Command List'' can register up to 32 ''read'' or ''write'' commands, that are handled in pseudo-parallelism by a dedicated channel controller.
     12According to the AHCI specification, each channel[k] controller uses a private ''Command List'' implemented in the kernel memory. For each channel[k], the associated ''Command List'' can register up to 32 ''read'' or ''write'' concurrent commands, that are handled by the channel controller.
    1313
    1414This VCI component has a DMA capability, and use it to access both the ''Command List'' and to transfer the data to or from memory.
    … …  
    1616On the VCI side, it supports both 32 bits and 64 bits data words, and up to 64 bits address width.
    1717
    18 For each channel[k], a single IRQ[k] can be (optionally) asserted as soon as at list one command in the Command List is completed. WARNING: the IRQ[k] is associated to a specific channel, but not to a specific command.
     18For each channel[k], a single IRQ[k] can be (optionally) asserted when one (or several) command(s) in the Command List completes. WARNING: the IRQ[k] is associated to a specific channel, but not to a specific command.
    1919
    2020This hardware component checks for segmentation violation, and can be used as a default target.
    … …  
    2222== 2) Command List ==
    2323
    24 For each channel, the !VciMultiAhci driver must use a software FIFO to register a command: The Command Descriptor array (32 entries) define the Command List. Each Command Descriptor occupies 16 bytes, and must be aligned on a 16 bytes boundary. It contains mainly the physical address of the associated Command Table. A command Descriptor is defined by the following C structure:
     24For each channel, the !VciMultiAhci driver must use a specific Command List to register a command: The Command Descriptor array (32 entries) define the Command List. Each Command Descriptor occupies 16 bytes, and must be aligned on a 16 bytes boundary. It contains mainly the physical address of the associated Command Table. A command Descriptor is defined by the following C structure:
    2525
    2626{{{
    … …  
    5151    unsigned char      lba4;        // LBA 39:32
    5252    unsigned char      lba5;        // LBA 47:40
    53     unsigned char      res1;        // reserved
    5453    unsigned char      res2;        // reserved
    5554    unsigned int       res3;        // reserved
    … …  
    9998
    10099 * '''HBA_PXCI'''
    101 Bit-vector, one bit per command in the Command List. These bits are handled as 32 set/reset flip-flops: set by software when a command ha been posted in Command List / reset by hardware when the command is completed. A write command on this register makes a OR between the VCI WDATA field and the current value of the register.
     100Bit-vector, one bit per command in the Command List. These bits are handled as 32 set/reset flip-flops: set by software when a command has been posted in Command List / reset by hardware when the command is completed. A write command on this register makes a OR between the VCI WDATA field and the current value of the register.
    102101
    103102For extensibility issues, the software drivers must use the mnemonics defined [source:trunk/soclib/soclib/module/connectivity_component/vci_multi_ahci/include/soclib/multi_ahci.h here] to access this component .