Changes between Version 25 and Version 26 of Component/Vci Multi Ahci
- Timestamp:
- Oct 31, 2016, 6:39:50 PM (8 years ago)
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Component/Vci Multi Ahci
v25 v26 10 10 The block size must be a power of 2 between 128 and 4096 bytes. 11 11 12 According to the AHCI specification, each channel[k] controller uses a private ''Command List'' that is handled as a software FIFO. For each channel[k], the associated ''Command List'' can register up to 32 ''read'' or ''write'' commands, that are handled in pseudo-parallelism by a dedicatedchannel controller.12 According to the AHCI specification, each channel[k] controller uses a private ''Command List'' implemented in the kernel memory. For each channel[k], the associated ''Command List'' can register up to 32 ''read'' or ''write'' concurrent commands, that are handled by the channel controller. 13 13 14 14 This VCI component has a DMA capability, and use it to access both the ''Command List'' and to transfer the data to or from memory. … … 16 16 On the VCI side, it supports both 32 bits and 64 bits data words, and up to 64 bits address width. 17 17 18 For each channel[k], a single IRQ[k] can be (optionally) asserted as soon as at list one command in the Command List is completed. WARNING: the IRQ[k] is associated to a specific channel, but not to a specific command.18 For each channel[k], a single IRQ[k] can be (optionally) asserted when one (or several) command(s) in the Command List completes. WARNING: the IRQ[k] is associated to a specific channel, but not to a specific command. 19 19 20 20 This hardware component checks for segmentation violation, and can be used as a default target. … … 22 22 == 2) Command List == 23 23 24 For each channel, the !VciMultiAhci driver must use a s oftware FIFOto register a command: The Command Descriptor array (32 entries) define the Command List. Each Command Descriptor occupies 16 bytes, and must be aligned on a 16 bytes boundary. It contains mainly the physical address of the associated Command Table. A command Descriptor is defined by the following C structure:24 For each channel, the !VciMultiAhci driver must use a specific Command List to register a command: The Command Descriptor array (32 entries) define the Command List. Each Command Descriptor occupies 16 bytes, and must be aligned on a 16 bytes boundary. It contains mainly the physical address of the associated Command Table. A command Descriptor is defined by the following C structure: 25 25 26 26 {{{ … … 51 51 unsigned char lba4; // LBA 39:32 52 52 unsigned char lba5; // LBA 47:40 53 unsigned char res1; // reserved54 53 unsigned char res2; // reserved 55 54 unsigned int res3; // reserved … … 99 98 100 99 * '''HBA_PXCI''' 101 Bit-vector, one bit per command in the Command List. These bits are handled as 32 set/reset flip-flops: set by software when a command ha been posted in Command List / reset by hardware when the command is completed. A write command on this register makes a OR between the VCI WDATA field and the current value of the register.100 Bit-vector, one bit per command in the Command List. These bits are handled as 32 set/reset flip-flops: set by software when a command has been posted in Command List / reset by hardware when the command is completed. A write command on this register makes a OR between the VCI WDATA field and the current value of the register. 102 101 103 102 For extensibility issues, the software drivers must use the mnemonics defined [source:trunk/soclib/soclib/module/connectivity_component/vci_multi_ahci/include/soclib/multi_ahci.h here] to access this component .