Changes between Version 2 and Version 3 of Component/Vci Multi Ahci

Timestamp:

Mar 29, 2015, 1:13:54 PM (10 years ago)

Author:

alain

Comment:

--

Component/Vci Multi Ahci

@@ -9 +9 @@
 and containing a complete disk image.
 Each channel[k] can perform data transfers between file[k] and a buffer in the physical memory
-of the virtual system. he number of supported channels, the file name(s), the VCI burst size, and the block size are hardware parameters,defined as constructors parameters. 
+of the virtual system. The number of supported channels, the file name(s), the VCI burst size, and the block size are hardware parameters, defined as constructor parameters. 
 The number of channels cannot be larger than 8. The burst size must be a power of 2 between 8 and 64 bytes.
 The block size must be a power of 2 between 128 and 4096 bytes.
@@ -29 +29 @@
 == 2) Command List ==
 
-For each channel, the VciMultiAhci driver must use two arrays to register commands: The Command Descriptor array (32 entries) define the Command List (software FIFO). Each Command Descriptor occupies 16 bytes, with the following format:
+For each channel, the VciMultiAhci driver must use a software FIFO to register a command: The Command Descriptor array (32 entries) define the Command List. Each Command Descriptor occupies 16 bytes, and contains mainly the physical address of the associated Command Table. A command Descriptor is defined by the following C structure:
 
 {{{
 typedef struct hba_cmd_desc_s  // size = 16 bytes
 {
-    unsigned char       flag[2];        // only one bit used : WRITE when bit 6 of flag[0] is set 
-    unsigned char       prdtl[2];       // Number of buffers (no more than 16535)
+    unsigned char       flag[2];        // WRITE when bit 6 of flag[0] is set 
+    unsigned char       prdtl[2];       // Number of buffers
     unsigned int        prdbc;          // Number of bytes actually transfered
     unsigned int        ctba;           // Command Table base address 32 LSB bits
@@ -42 +42 @@
 }}}
 
-== 3) Command Table
+== 3) Command Table ==
 
-== 2) Addressable registers ==
+There is one Command Table for each Command descriptor. For a given command, there is one single LBA (Logic Bloc Address) on the block device, coded on 48 bits, but the source (or destination) memory buffer can be split in a variable number of contiguous buffers. Therefore, the Command Table contains two parts: a fixed size Header, defining the LBA, and an array of buffer descriptors containing up to 248 buffer descriptors. A Command Table occupies 4 Kbytes, and is defined by the following C structures: 
+{{{
+typedef struct hba_cmd_table_s  // size = 4 Kbytes
+{
+
+    hba_cmd_header_t   header;      // contains LBA
+    hba_cmd_buffer_t   buffer[248]; // 248 buffers max
+
+} hba_cmd_table_t;
+
+typedef struct hba_cmd_header_s // size = 128 bytes
+{
+    unsigned int       res0;        // reserved 
+    unsigned char      lba0;        // LBA 7:0
+    unsigned char      lba1;        // LBA 15:8
+    unsigned char      lba2;        // LBA 23:16
+    unsigned char      res1;        // reserved
+    unsigned char      lba3;        // LBA 31:24
+    unsigned char      lba4;        // LBA 39:32
+    unsigned char      lba5;        // LBA 47:40
+    unsigned char      res2;        // reserved
+    unsigned int       res[29];     // reserved 
+} hba_cmd_header_t;
+
+typedef struct hba_cmd_buffer_s // size = 16 bytes
+{
+    unsigned int       dba;         // Buffer base address 32 LSB bits
+    unsigned int       dbau;        // Buffer base address 32 MSB bits
+    unsigned int       res0;        // reserved
+    unsigned int       dbc;         // Buffer byte count
+
+} hba_cmd_buffer_t;
+}}}
+
+== 4) Addressable registers ==
 
 Each channel[k] contains six 32 bits read/write registers:
 
  * '''HBA_PXCLB'''
-32 LSB bits of the Command List array physical address.
+32 LSB bits of the Command List physical base address.
+This address must be aligned on a 16 bytes boundary.
 
  * '''HBA_PXCLBU'''
-32 MSB bits of the Command List array physical address. * 
+32 MSB bits of the Command List array physical address.
 
  * '''HBA_PXIS'''
 Channel status, used for error reporting.
+||31||30||29||28     24||23    ...  8||7 ... 1||0||
 
  * '''HBA_PXIE'''