Changes between Version 3 and Version 4 of Component/Vci Multi Ahci
- Timestamp:
- Mar 29, 2015, 1:36:04 PM (10 years ago)
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Component/Vci Multi Ahci
v3 v4 91 91 * '''HBA_PXIS''' 92 92 Channel status, used for error reporting. 93 ||31||30||29||28 24||23 ... 8||7 ... 1||0|| 93 ||31||30||29||28 ... 24||23 ...... 8||7 ... 1||0|| 94 ||--||R ||--|| CMD_ID ||BUFFER_ID ||-------||D|| 95 - Bit[0] : set by hardware when at least one command has been completed. 96 - Bit[30] : set by hardware when an error has been detected in a command. 97 - Bit[28:24] : index of the faulty command in command list. 98 - Bit[23:8] : index of the faulty buffer in the faulty command. 99 When an error is detected for a command, the R bit is set, the channel FSM stops immediately, without handling the remaining commands in the command list, and keep blocked, waiting for a software reset on this PXIS register. 94 100 95 101 * '''HBA_PXIE''' 96 Intcommanderrupt enable. 102 This register enables and disables the IRQ reporting the completion (success or error) of the commands for a given channel. Only 2 bits are used: 103 - Bit 0 : when set, an IRQ is generated when bit0 of AHCI_PXIS is set, 104 - Bit 30 : when set, an IRQ is generated when bit30 of AHCI_PXIS is set, 97 105 98 106 * '''HBA_PXCMD''' 99 Boolean : running when non zero107 Boolean : The corresponding channel is activated to poll the command list when non zero. 100 108 101 109 * '''HBA_PXCI''' 102 110 Bit-vector, one bit per command in the Command List. These bits are handled as 32 set/reset flip-flops: set by software when a command ha been posted in Command List / reset by hardware when the command is completed. 103 111 104 * '''BLOCK_DEVICE_OP''' (write only)105 Type of operation, writing here initiates the operation.This register goes back to BLOCK_DEVICE_NOOP when operation is finished. The following operations codes are defined:106 || `BLOCK_DEVICE_NOOP` || No operation ||107 || `BLOCK_DEVICE_READ` || Transfer from block device to memory ||108 || `BLOCK_DEVICE_WRITE` || Transfer from memory to block device ||109 112 110 * '''BLOCK_DEVICE_STATUS''' (read only) 111 State of the transfer. Reading this register while not busy resets its value to IDLE, and acknowledge the IRQ. Value may be one of : 112 || `BLOCK_DEVICE_IDLE` || 113 || `BLOCK_DEVICE_BUSY` || 114 || `BLOCK_DEVICE_READ_SUCCESS` || 115 || `BLOCK_DEVICE_WRITE_SUCCESS` || 116 || `BLOCK_DEVICE_READ_ERROR` || 117 || `BLOCK_DEVICE_WRITE_ERROR` || 113 For extensibility issues, you should access this component using these globally-defined offsets. 118 114 119 * '''BLOCK_DEVICE_IRQ_ENABLE''' (read/write)120 Boolean enabling the IRQ line121 115 122 * '''BLOCK_DEVICE_SIZE''' (read only) 123 Number of blocks addressable in the block device 116 == 5) Component definition & usage == 124 117 125 * '''BLOCK_DEVICE_BLOCK_SIZE''' (read only) 126 Block size (in bytes) 118 source:trunk/soclib/soclib/module/connectivity_component/vci_multi_ahci/caba/metadata/vci_multi_ahci.sd 127 119 128 For extensibility issues, you should access this component using globally-defined offsets.129 You should include file `soclib/block_device.h` from your software, it130 defines `BLOCK_DEVICE_COUNT`, `BLOCK_DEVICE_READ`, ...131 120 132 Sample code: 133 Please see reference implementation in source:trunk/soclib/soclib/platform/topcells/caba-vgmn-block_device-mips32el 134 135 (add -I/path/to/soclib/include to your compilation command-line) 136 137 == 2) Component definition & usage == 138 139 source:trunk/soclib/soclib/module/connectivity_component/vci_block_device/caba/metadata/vci_block_device.sd 140 141 See [wiki:SoclibCc/VciParameters SoclibCc/VciParameters] 142 {{{ 143 Uses( 'vci_block_device', **vci_parameters ) 144 }}} 145 146 == 3) CABA Implementation == 121 == 6) CABA Implementation == 147 122 148 123 === CABA sources === 149 124 150 * interface : source:trunk/soclib/soclib/module/connectivity_component/vci_ block_device/caba/source/include/vci_block_device.h151 * implementation : source:trunk/soclib/soclib/module/connectivity_component/vci_ block_device/caba/source/src/vci_block_device.cpp125 * interface : source:trunk/soclib/soclib/module/connectivity_component/vci_multi_ahci/caba/source/include/vci_multi_ahci.h 126 * implementation : source:trunk/soclib/soclib/module/connectivity_component/vci_multi_ahci/caba/source/src/vci_multi_ahci.cpp 152 127 153 128 === CABA Constructor parameters === … … 159 134 const soclib::common::IntTab &srcid, // Initiator index 160 135 const soclib::common::IntTab &tgtid, // Target index 161 const std:: string &filename, // mapped file, may be a host block device136 const std::vector<std::string> &filenames, // vector of filenames (one per channel) 162 137 const uint32_t block_size = 512, // block size in bytes 163 138 const uint32_t latency = 0); // initial access time (number of cycles) … … 170 145 * '''p_vci_target''' : The VCI target port 171 146 * '''p_vci_initiator''' : The VCI initiator port 172 * ''' p_irq''' : Interrupt port147 * '''*p_channel_irq''' : Interrupt ports (one per channel) 173 148 174 == 4) TLM-DT Implementation ==149 == 7) TLM-DT Implementation == 175 150 176 === TLM-DT sources === 151 Not available yet. 177 152 178 * interface : source:trunk/soclib/soclib/module/connectivity_component/vci_block_device/tlmdt/source/include/vci_block_device.h179 * implementation : source:trunk/soclib/soclib/module/connectivity_component/vci_block_device/tlmdt/source/src/vci_block_device.cpp180 181 === TLM-DT Constructor parameters ===182 183 {{{184 VciBlockDevice(185 sc_module_name name, // Component Name186 const soclib::common::MappingTable &mt, // MappingTable187 const soclib::common::IntTab &srcid, // Initiator index188 const soclib::common::IntTab &tgtid, // Target index189 const std::string &filename, // mapped file, may be a host block device190 const uint32_t block_size = 512, // block size in bytes191 const uint32_t latency = 0); // initial access time (number of cycles)192 }}}193 194 === TLM-DT Ports ===195 196 * '''p_vci_target''' : The VCI target port197 * '''p_vci_initiator''' : The VCI initiator port198 * '''p_irq''' : Interrupt port