7 | | This component emulates a multi-channels disk controller with VCI interface. Each channel[k] can |
8 | | access a different physical disk, modeled as a different file[k] belonging to the host system, |
9 | | and containing a complete disk image. |
10 | | Each channel[k] can perform data transfers between file[k] and a buffer in the physical memory |
11 | | of the virtual system. The number of supported channels, the file name(s), the VCI burst size, and the block size are hardware parameters, defined as constructor parameters. |
| 7 | This component emulates a multi-channels disk controller respecting the AHCI standard. Each channel[k] can access a different physical disk, modeled as a file (one file per channel) belonging to the host system, and containing a complete disk image. |
| 8 | Each channel[k] can perform data transfers between file[k] and a buffer in the physical memory of the virtual system. The number of supported channels, the file name(s), the VCI burst size, and the block size are hardware parameters, defined as constructor parameters. |
15 | | According to the AHCI specification, each channel[k] controller uses a private ''Command List'' |
16 | | that is handled as a software FIFO. For each channel[k], the ''Command List'' can register up to 32 |
17 | | ''read'' or ''write'' commands, that are handled in pseudo-parallelism by the channel controller. |
18 | | This VCI component has a DMA capability, and use it to access both the ''Command List'' and to transfer |
19 | | the data to or from memory. |
| 12 | According to the AHCI specification, each channel[k] controller uses a private ''Command List'' that is handled as a software FIFO. For each channel[k], the ''Command List'' can register up to 32 ''read'' or ''write'' commands, that are handled in pseudo-parallelism by the channel controller. |
| 13 | This VCI component has a DMA capability, and use it to access both the ''Command List'' and to transfer the data to or from memory. |