Changes between Version 6 and Version 7 of Component/Vci Multi Dma

Timestamp:

Dec 11, 2011, 11:26:05 AM (12 years ago)

Author:

alain

Comment:

--

Component/Vci Multi Dma

@@ -34 +34 @@
 
  * '''DMA_LEN[k]''' (Read / Write)
-Writing in this register defines the length of transfer (in bytes), and starts the transfer. 
-This register gets back to 0 when transfer is finished.
-This register can be used to test the DMA coprocessor status.
+A write access defines the length of the transfer (in bytes), and starts the transfer. 
+A read access returns the DMA channel status. The relevant values for the status are:
+   || Cnannel Status || Value ||
+   ||DMA_IDLE        ||  0    ||
+   ||DMA_SUCCESS     ||  1    || 
+   ||DMA_READ_ERROR  ||  2    ||
+   ||DMA_WRITE_ERROR ||  3    ||
+   ||DMA_BUSY        ||  >3   ||
 
  * '''DMA_RESET[k]''' (Write-only)