Changes between Version 7 and Version 8 of Component/Vci Multi Dma

Timestamp:

Dec 11, 2011, 11:50:18 AM (15 years ago)

Author:

alain

Comment:

--

Component/Vci Multi Dma

@@ -14 +14 @@
 corresponding to 8 independant DMA channels. As there is only one VCI initiator port, the general arbitration policy between the active channels is round-robin.
 
-The number of channels and the max burst length are constructor parameters.
-The burst length parameter must be multiple of 4 bytes.
+The number of channels (CHANNELS) and the burst length (MAX_BURST_LENGTH) are constructor parameters. The burst length parameter must be multiple of 4 bytes.
 
 This component makes the assumption that the VCI RDATA & WDATA fiels have 32 bits.
@@ -51 +50 @@
 A non zero value disables the IRQ line. The RESET value is zero.
 
-The aligned segment size associated to this VCI target is 256 bytes, as only 8 address bits are decoded : the 5 LSB bits define the target register, and the 3 MSB bits define the channel index.
+In order to support various protection mechanisms, each channel akes 4K bytes in the address space. The segment size is 32 K bytes, and the segment associated to this peripheral must be aligned on a 32K bytes boundary. Only 8 address bits are decoded : 
+ * The five bits ADDRESS[4:0] define the target register.
+ * The three bits ADDRESS[14:12] define the channel index.
 
 For extensibility issues, you should access the DMA using globally-defined offsets, and