Changes between Version 17 and Version 18 of Component/Vci Multi Timer
- Timestamp:
- May 6, 2009, 5:54:02 PM (15 years ago)
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Component/Vci Multi Timer
v17 v18 30 30 * `TIMER_PERIOD` 31 31 This 32 bits register defines the period between two successive interrupts. 32 It may be read or written to. 32 It may be read or written to. When written to, the new period is immediatly taken into account. 33 33 34 34 * `TIMER_RESETIRQ`