Changes between Version 8 and Version 9 of Component/Vci Multi Timer

Timestamp:

May 9, 2007, 3:00:29 PM (17 years ago)

Author:

Nicolas Pouillon

Comment:

--

Component/Vci Multi Timer

@@ -5 +5 @@
 This VCI target is a memory mapped peripheral that can
 control up to 256 software controlled timers.
-Each timer can optionally generates an independent periodic interrupt.
+Each timer can optionally generate an independent periodic interrupt.
 The memory segment allocated to this component must be aligned
 on 4K bytes boundary.
-The timer index i is defined by the ADDRESS![12:4] bits.
+
 This hardware component cheks for segmentation violation, and can be used
 as a default target.
 
+= Memory region layout =
+
+The timer index i is defined by the ADDRESS![12:4] bits.
+
 Each timer contains 4 memory mapped registers:
 
- * '''TIMER_VALUE'''     : ADDRESS![3:0] = 0x0
-This 32 bits register is unconditionnally incremented at each cycle.
+ * `TIMER_VALUE`: ADDRESS![3:0] = 0x0
+This 32 bits register is unconditionally incremented at each cycle.
 A read request returns the current time contained in this register.
 A write request sets a new value in this register.
 
- * '''TIMER_RUNNING''' : ADDRESS![3:0] = 0x4 
-When the Boolean value contained in this register is true, 
-the corresponding interrupt is enabled.  
-A write request of a zero gives resets this register.
-A write request of a non-zero value sets this registe.
+ * `TIMER_MODE`: ADDRESS![3:0] = 0x4 
+   This register contains two flags:
+   * Bit 0: TIMER_RUNNING. When 1, the associated timer will decrease on each cycle
+   * Bit 1: TIMER_IRQ_ENABLED: When 1, the associated IRQ line will be activated if the timer underflows.
 
- * '''TIMER_PERIOD'''    : ADDRESS![3:0] = 0x8
+ * `TIMER_PERIOD`: ADDRESS![3:0] = 0x8
 This 32 bits register defines the period between two successive interrupts.
-A write request writes a new value in this register, and the TIMER_RUNNING
-register is set to false.
-A read request returns the current value in this register.
+It may be read or written to.
 
- * '''TIMER_RESETIRQ''' : ADDRESS![3:0] = 0xC
+ * `TIMER_RESETIRQ`: ADDRESS![3:0] = 0xC
 Any write request in this Boolean register will reset the pending IRQ.
 A read request returns the zero value when there is no pending interrupt,
 and returns a non zero value if there is a pending interrupt.
 
+= Component usage =
+
+For extensibility issues, you should access your terminal using globally-defined offsets.
+
+You should include file source:trunk/soclib/include/soclib/timer.h from your software, it
+defines `TIMER_VALUE`, `TIMER_MODE`, `TIMER_PERIOD`, `TIMER_RESETIRQ`, `TIMER_SPAN`,
+`TIMER_RUNNING`, `TIMER_IRQ_ENABLED`.
+
+Sample code:
+{{{
+#include "soclib/tty.h"
+
+static const volatile void* timer_address = 0xc0000000;
+
+static timer_test(const size_t timer_no)
+{
+    volatile int *timer = ((int*)timer_address) + timer_no*TIMER_SPAN;
+
+    // Getting / setting timer current value
+    timer[TIMER_VALUE] = 0x2a00;
+    uint32_t foo = timer[TIMER_VALUE];
+
+    // Enabling timer and interrupt
+    timer[TIMER_MODE] = TIMER_RUNNING | TIMER_IRQ_ENABLED;
+
+    // Getting IRQ status, and resetting IRQ
+    if ( timer[TIMER_RESETIRQ] )
+        timer[TIMER_RESETIRQ] = 0;
+}
+}}}
+
+(add -I/path/to/soclib/include to your compilation command-line)
+
 = !VciMultiTimer CABA  Implementation =
 
 The caba implementation is in 
- * source:trunk/soclib/systemc/include/caba/target/vci_multi_timer.h
- * source:trunk/soclib/systemc/src/caba/target/vci_multi_timer.cc
+ * source:trunk/soclib/systemc/include/caba/target/vci_timer.h
+ * source:trunk/soclib/systemc/src/caba/target/vci_timer.cc
 
 == Template parameters: ==
+
  * The VCI parameters
 
@@ -59 +94 @@
  * sc_in<bool> '''p_clk''' : Global system clock
  * soclib::caba::!VciTarget<vci_param> '''p_vci''' : The VCI port
- * sc_out<bool> '''*p_irq''' : Pointer on Interrupts ports table
+ * sc_out<bool> '''p_irq[]''' : Interrupts ports array