Changes between Version 8 and Version 9 of Component/Vci Mwmr Controller

Timestamp:

Feb 25, 2008, 4:33:59 PM (16 years ago)

Author:

alain

Comment:

--

Component/Vci Mwmr Controller

@@ -21 +21 @@
 Besides the communication channels, this MWMR controller provides a variable number
 of unidirectionnal 32-bits signals going from/to the coprocessor.
- * from the coprocessor, they are ''status'' registers
- * to the coprocessor, they are ''configuration'' registers
+ * from the coprocessor, they are used to read the value stored in ''status'' registers
+ * to the coprocessor, they are used to write values into ''configuration'' registers
 
 This hardware component cheks for segmentation violation, and can be used
@@ -28 +28 @@
 
 As a target this component contains the following memory mapped registers:
- * Registers 0 to `MWMR_IOREG_MAX-1`
-When read from, they reflects status registers, when written to, they reflects the control registers.
+ * Status & Configuration Registers  (indexed from 0 to `MWMR_IOREG_MAX-1`)
+A read access returns the value stored in the corresponding coprocessor status register. 
+A write access changes the value stored in the corresponding coprocessor configuration registers.
 
  * `MWMR_RESET`
-Writing into this register resets the current state of the controller, flushing all hardware FIFOs and the MWMR controller configuration.
+Writing into this register resets the current state of the controller, flushing all hardware FIFOs and all MWMR channels configuration.
 
  * `MWMR_CONFIG_FIFO_WAY` and `MWMR_CONFIG_FIFO_NO`
 Used to designate the currently configured MWMR channel. WAY may be `MWMR_TO_COPROC` or `MWMR_FROM_COPROC`, 
-NO may be any MWMR channel in the selected way.
+NO is the MWMR channel index, for the selected way.
 
  * `MWMR_CONFIG_STATUS_ADDR`