Changes between Version 8 and Version 9 of Component/Vci Mwmr Dma

Timestamp:

Apr 9, 2015, 4:34:40 PM (9 years ago)

Author:

alain

Comment:

--

Component/Vci Mwmr Dma

@@ -59 +59 @@
 
 The relevant values for the CHANNEL_STATUS register are the following:
-||  symbolic value    || description                                         ||
-|| CHANNEL_SUCCESS    || DMA transfer successfully completed                 ||
-|| CHANNEL_ERROR_DATA || Bus error accessing the memory data buffer          ||
-|| CHANNEL_ERROR_DESC || Bus error accessing the MWMR FIFO descriptor buffer ||
-|| CHANNEL_ERROR_DATA || Bus error accessing the MWMR FIFO lock              ||
-All other values are equivalent to channel busy.
+||  symbolic value        ||       description                                   ||
+|| MWR_CHANNEL_SUCCESS    || DMA transfer successfully completed                 ||
+|| MWR_CHANNEL_ERROR_DATA || Bus error accessing the memory data buffer          ||
+|| MWR_CHANNEL_ERROR_DESC || Bus error accessing the MWMR FIFO descriptor buffer ||
+|| MWR_CHANNEL_ERROR_LOCK || Bus error accessing the MWMR FIFO lock              ||
+|| MWR_CHANNEL_BUSY       || Transfer not completed                              ||
 
 For extensibility issues, you should access these registers using the offsets defined [source:trunk/soclib/soclib/module/infrastructure_component/dma_infrastructure/vci_mwmr_dma/include/soclib/mwmr_dma.h mwmr_dma.h here].