Changes between Version 1 and Version 2 of Component/Vci Pi Initiator Wrapper


Ignore:
Timestamp:
May 5, 2007, 11:21:31 PM (18 years ago)
Author:
alain
Comment:

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  • Component/Vci Pi Initiator Wrapper

    v1 v2  
    1111 * The supported PIBU response codes are PI_ACK_RDY, PI_ACK_WAT, and PI_ACK_ERR.
    1212 * The VCI initiator is supposed to be "fair" : when a command packet starts, the CMDVAL signal is true until the last word of the VCI packet (marqued by the EOP signal), and the RSPACK signal is supposed to be always true.
    13  * The VCI command packet can have any leng, but the VCI commands VCI_READLOCK & VCI_NOP are not supported.
     13 * The VCI command packet can have any length, but the VCI commands VCI_READLOCK & VCI_NOP are not supported.
    1414 * Most output ports, including PI.A, PI.LOCK, VCI.RDATA, and VCI.RERROR are Mealy signals.
    1515 
    … …  
    3737 * sc_out<bool> '''p_req''' : bus request port (to the PIBUS controller)
    3838 * soclib::caba::!VciTarget<vci_param> '''p_vci''' : The VCI port
    39  * soclib::caba::PibusInitiator '''p_pi''' : The PIBUS port
     39 * soclib::caba::!PibusInitiator '''p_pi''' : The PIBUS port