Changes between Version 15 and Version 16 of Component/Vci Ring Initiator Wrapper


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Timestamp:
Jan 19, 2009, 1:52:42 PM (15 years ago)
Author:
abdelmalek.si-merabet@…
Comment:

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  • Component/Vci Ring Initiator Wrapper

    v15 v16  
    55== 1) Functional Description ==
    66
    7 This hardware component connect a VCI initiator to a RING interconnect. It can be used in conjunction with the [wiki:Component/VciRingTargetWrapper VciRingTargetWrapper] and the [wiki:Component/RingRegister RingRegister] components to build a RING interconnect. This type of interconnect is well suited for FPGA implementations.
     7This hardware component connect a VCI initiator to a RING interconnect. It can be used in conjunction with the [wiki:Component/VciRingTargetWrapper VciRingTargetWrapper] component to build a RING interconnect. This type of interconnect is well suited for FPGA implementations.
    88 
    99== 2) Component definition & usage ==
     10
     11source:trunk/soclib/soclib/module/network_component/vci_ring_initiator_wrapper/caba/metadata/vci_ring_initiator_wrapper.sd
    1012
    1113== 3) CABA  Implementation ==
     
    1921
    2022{{{
    21 VciRingInitiatorWrapper(sc_module_name  insname);  // instance name
     23VciRingInitiatorWrapper(sc_module_name  insname,                    // instance name
     24                            bool            alloc_init,             // default token owner
     25                            const int       &wrapper_fifo_depth,    // command and response fifo depths
     26                            const soclib::common::MappingTable &mt, // mapping table
     27                            const soclib::common::IntTab &ringid,   // Global subsystem index
     28                            const int &srcid);                      // attached initiator index
     29
    2230}}}
    2331
    2432=== CABA Ports ===
     33 * sc_in<bool>                          p_clk;       // Global System Clock
     34 * sc_in<bool>                          p_resetn;    // Global System reset 
     35 * soclib::caba::!RingIn                p_ring_in;   // Ring input port
     36 * soclib::caba::!RingOut               p_ring_out;  // Ring output port
     37 * soclib::caba::!VciTarget<vci_param>  p_vci;       // VCI target port
    2538
    26  * sc_in<bool>                                     p_clk;  // Global System Clock
    27  * sc_in<bool>                                     p_resetn; // Global System reset
    28  * soclib::caba::RingINPort<vci_param>             p_ri;  // Ring input port
    29  * soclib::caba::RingOUTPort<vci_param>            p_ro;  // Ring output port
    30  * soclib::caba::!VciTarget<vci_param>              p_vci;  // VCI target port
    31 
    32  == 4) TLM-T  Implementation ==
     39== 4) TLM-T  Implementation ==
    3340
    3441The TLM-T implementation is not yet available.
    35 You can use the [wiki:Component/VciVgmn VciVgmn] generic interconnect.
    3642