Changes between Initial Version and Version 1 of Component/Vci Simple Rom


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Timestamp:
Nov 19, 2014, 3:15:02 PM (9 years ago)
Author:
alain
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  • Component/Vci Simple Rom

    v1 v1  
     1[wiki:Component SocLib Components General Index]
     2
     3= !VciSimpleRom =
     4
     5== 1) Functional Description ==
     6
     7This VCI target is a multi-segments ROM controller.
     8
     9The VCI DATA width must be 32 or 64 bits.
     10Th VCI ADDRESS and the PLEN field must be multiple of 4 bytes.
     11
     12This component handles one or several independent memory segments. Each segment is defined by a base address and a size (number of bytes).
     13
     14A READ burst command packet (such a cache line request) contains one single flit. The number of flits in the response packet depends on the PLEN field:
     15 * If VCI DATA width = 32 bits, each flit contains 4 bytes, and the number of flits is PLEN/4.
     16 * If VCI DATA width = 64 bits, and PLEN define an even number of words, each flit contains 8 bytes, and the number of flits is PLEN/8.
     17 * If VCI DATA width = 64 bits, and PLEN define an odd number of words, the last flit contains only 4 bytes (right justified), and the number of flits is PLEN/8 + 1.
     18
     19The !VciSimpleRam component initializes its segments from a ELF binary if a
     20[wiki:Component/Loader Loader] is attached to it.
     21
     22== 2) Component definition & usage ==
     23
     24source:trunk/soclib/soclib/module/internal_component/vci_simple_rom/caba/metadata/vci_simple_rom.sd
     25
     26{{{
     27Uses( 'vci_simple_ram' )
     28}}}
     29
     30== 3) CABA Implementation ==
     31 
     32=== CABA sources ===
     33
     34 * interface : source:trunk/soclib/soclib/module/internal_component/vci_simple_rom/caba/source/include/vci_simple_rom.h
     35 * implementation : source:trunk/soclib/soclib/module/internal_component/vci_simple_rom/caba/source/src/vci_simple_rom.cpp
     36
     37=== CABA Constructor parameters ===
     38
     39{{{
     40VciSimpleRom(
     41     sc_module_name name,                     // Instance name
     42     const soclib::common::IntTab &index,     // Target index
     43     const soclib::common::MappingTable &mt,  // Mapping Table
     44     soclib::common::Loader &loader);         // Loader
     45}}}
     46
     47=== CABA Ports ===
     48
     49 * '''p_resetn''' : hardware reset
     50 * '''p_clk'''    :  clock
     51 * '''p_vci'''    : The VCI port
     52