Changes between Version 11 and Version 12 of Component/Vci Xcache

Timestamp:

Feb 9, 2008, 12:33:13 PM (16 years ago)

Author:

alain

Comment:

--

Component/Vci Xcache

@@ -8 +8 @@
 VCI advanced protocol. Thanks to a normalized interface 
 (source:trunk/soclib/communication/xcache/caba/source/include/xcache_signals.h),
-this blocking cache controller can be used by several RISC processors
-(such as Mips R3000, Sparc V8, or !OpenRisc 1000). It contains two separated
+this blocking cache controller can be used by several 32 bits RISC processors
+(such as Mips R3000, Sparc V8, or !PPC 405). It contains two separated
 instruction and data caches, sharing the same VCI interface.
 (source:trunk/soclib/communication/vci/caba/source/include/vci_signals.h)
@@ -41 +41 @@
 == Component definition ==
 
-Available in source:trunk/soclib/module/internal_component/vci_xcache/caba/metadata/vci_xcache.sd
+Available in source:trunk/soclib/soclib/module/internal_component/vci_xcache/caba/metadata/vci_xcache.sd
 
 == Usage ==